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• A new strategy based on DMSG design is proposed to boost the performance of JL CNTTFETs. • The computational assessment is based on the NEGF-based quantum simulation. • The DMSG strategy has been found efficient in alleviating the DSDT issue. • Substantial improvements have been recorded in terms of scaling capability and switching performance. • The DMSG approach can be applied to boost similar aggressively scaled JL TFETs. This paper proposes a novel technique based on dual-material source gate (DMSG) design to enhance the performance of a junctionless carbon nanotube tunneling field-effect transistor (JL CNTTFET) endowed with ultrascaled coaxial gate. The nanodevice is computationally investigated by quantum transport simulations, which treat the ballistic transport via the non-equilibrium Green's function (NEGF) formalism while considering the self-consistent nanodevice electrostatics. The dual-material source gate design aims to reduce the ultrascaled gate effects on the performance of the CNTTFET while maintaining the junctionless benefits. It has been found that the engineered source-gate work function based on the dual-material strategy can greatly improve the performance of the JL CNTTFET with 5-nm coaxial-gate length, namely the subthreshold and switching characteristics. The record of steeper swing factor, high current ratio, and enhanced ambipolar and leakage current in an ultrascaled regime has explicitly confirmed the efficacy of the proposed DMSG-based improvement technique while making it a promising and viable technique for high-performance ultrascaled junctionless tunnel nanotransistors. [ABSTRACT FROM AUTHOR]

The combination of modern electronic devices and nanoelectromechanical systems (NEMS) has given new impulses to the development of sensors and biosensors. A new pressure microsensor based on graphene field-effect transistor (GFET) endowed with dual-gate design is proposed herein. The movable top-gate concept is used as sensing principle to detect the pressure-induced nanoscale displacement. A compact GFET drain-current model based on drift-diffusion carrier transport and field-effect principle is employed for the performance assessment of the proposed pressure microsensor. The investigation includes the top-gate and dual-gate configuration, transfer characteristic behavior, sensitivity analysis, operating regime, and the impact of gates' biases on the microsensor sensitivity. The performance analysis reveals that the dual-gate GFET design outperforms the top-gated GFET in terms of sensitivity. In addition, the high back-gate voltage and the low drain-source voltage have been found useful in improving the sensitivity of the DG GFET-based pressure sensor. Moreover, a metaheuristic optimization technique based on genetic algorithm (GA) has been adopted to find the optimal sensor parameters values that lead to the best sensitivity performance. The merits of the proposed dual-gate GFET-based pressure microsensor, namely small-size, high-sensitivity, graphene cost, and CMOS compatibility, make it a promising candidate for high-performance pressure sensing applications. [ABSTRACT FROM AUTHOR]

Carbon nanotube field-effect transistors (CNTFETs) and their growing applications are becoming part of modern nanoelectronics, which is in urgent need for high-performance ultrascaled transistors. Sub-10-nm junctionless ballistic carbon nanotube field-effect transistors (JL-CNTFET) with substantial improved performance are computationally proposed herein. The non-equilibrium Green's function (NEGF) simulation is used for the computational assessment. The proposed simple improvement technique is based on the use of high n-type doping concentration at the level of carbon nanotube underneath the gate while keeping the junctionless paradigm that facilitates tremendously the fabrication processes of ultrascaled FETs. It has been found that the proposed doping profile can significantly mitigate several ultrascaling effects while boosting the performance of sub-10-nm JL-CNTFETs. The recorded enhancements include the leakage current, current ratio, subthreshold swing, switching speed, switching energy, drain-induced barrier lowering, and threshold voltage roll-off. The significant improvements obtained in this work for sub-10-nm JL-CNTFETs, make the proposed strategy, which is simple, feasible, and efficient, as a promising technique for improving ultrascaled FETs endowed with other gate geometries and channel nanomaterials while paving the way towards high-performance sub-5-nm FETs. [ABSTRACT FROM AUTHOR]

In this paper, new graphene nanoribbon tunnel field-effect transistors (GNRTFETs) endowed with specific doping profiles are proposed, assessed, and compared with the conventional design through a computational investigation. The used quantum simulation is based on solving self-consistently the Poisson and Schrödinger equations using the non-equilibrium Green's function formalism in the ballistic limit. The numerical study deals with GNRTFET designs with 5 nm gate length while comparing their I-V transfer proprieties, subthreshold swing, charge density, current ratio, intrinsic delay, and power-delay product. The proposed designs, which are endowed with new doping profiles, have been found efficient in mitigating the direct source-to-drain tunneling issue of ultrascaled GNR-based TFET and in improving the ambipolar behavior while boosting the performance of the GNRTFETs. As interesting results, highly improved minimum leakage current, subthreshold swing, and switching parameters have been recorded by means of the proposed channel doping engineering-based approach. The obtained substantial improvements in the performance of ultrascaled GNRTFETs make the proposed approach as a promising way for the continual shrinking of tunnel field-effect transistors (sub-5-nm) while maintaining the required high-performance. [ABSTRACT FROM AUTHOR]

In this paper, a novel junctionless carbon nanotube field-effect transistor (JL-CNTFET) endowed with a split coaxial gate (SCG) is proposed through a rigorous self-consistent simulation. This latter is based on solving self-consistently the Schrödinger and Poisson equations using the non-equilibrium Green's function (NEGF) formalism and the finite difference method (FDM), respectively. It has been found that the suggested SCG JL-CNTFET can exhibit significantly improved switching performance including the off-current, current ratio, intrinsic delay and power-delay product, due to the decreasing of band-to-band tunneling via the split-gate strategy. The obtained results indicate that the proposed SCG JL-CNTFET can be considered as a promising device for the futuristic high-performance integrated circuits intended for low-power and high-speed applications. [ABSTRACT FROM AUTHOR]