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The filamentary resistance switching mechanism of a Pt/40 nm TiO2/Pt capacitor structure in voltage sweep mode was investigated. It was unambiguously found that the conducting filaments propagate from the cathode interface and that the resistance switching is induced by the rupture and recovery of the filaments in the localized region (3–10 nm thick) near the anode. The electrical conduction behavior in the high resistance state was well explained by the space charge limited current (SCLC) mechanism that occurs in the filament-free region. The various parameters extracted from the SCLC fitting supported the localized rupture and formation of filaments near the anode. [ABSTRACT FROM AUTHOR]

This study investigated the variations in the dielectric constant with film thickness and measurement temperature of (Ba0.48Sr0.52)TiO3 thin-film capacitors with thicknesses ranging from 65 to 273 nm. The films were prepared by an on-axis rf magnetron sputtering, having Pt top and bottom electrodes. The thicker film showed a higher dielectric constant with a larger temperature dependence of the dielectric constant, and the maximum dielectric constant was observed at a higher temperature. The thickness-dependent dielectric constant at a given measurement temperature was explained by using the previously reported interfacial capacitance model, containing the intrinsic dead layer and electrode polarization. The temperature-dependent dielectric property could be explained using a modified Curie-Weiss (C-W) behavior of the film taking the nonferroelectric interfacial capacitance components into consideration. However, the C-W constant and Curie temperature of the ferroelectric layer must be modified in order to obtain a reasonable interfacial layer thickness. [ABSTRACT FROM AUTHOR]

The minority carrier (electron) capture process and the interface trap density of a TiN/Al[sub 2]O[sub 3]/p-Si metal-oxide-semiconductor capacitor were examined by deep level transient spectroscopy (DLTS). It was found that the activation energies of the large peaks detected at higher temperatures with gate bias voltages of 1.8, 1.5, 1.3, and 1.1 V were 0.19, 0.24, 0.29, and 0.37 eV, respectively. These energies were related to the electron-capture process from the conduction band by interface states in the upper half of the Si band gap. The interface state passivation effect of postannealing in a hydrogen ambient was studied from the minority carrier capture process and the usual DLTS signals. The D[sub it] at an energy of 0.35 eV from the valence bandedge decreased from 1 × 10[sup 12] cm[sup -2] eV[sup -1] at the as-fabricated state to 4 × 10[sup 11] cm[sup -2] eV[sup - 1] after H[sub 2] annealing at 450 °C. It was also found that the D[sub it] at an energy of 0.3 eV from the conduction bandedge decreased to the same amount by the same annealing process. [ABSTRACT FROM AUTHOR]

The film thickness-dependent imprinting behavior (voltage shift) of (Pb, La)(Zr, Ti)O[sub 3] capacitors was evaluated by a thermal stress process under a remanence bias. The remanent polarization (P[sub r]) was found to be almost independent of the film thickness whereas in the 50-300 nm range the relative dielectric constant (ε[sub r]) increased linearly with the square root of the film thickness. It was found that the voltage shift, which was attributed to the accumulation of charged defects near the electrode interface, also increased linearly with increasing film thickness. In addition, the charge accumulated thickness varied with the square root of the film thickness. This was established from a simple assumption that the level of charge accumulation is determined by the product of the total amount of charged defects (total film thicknessxcharged defect density) and the internal field that is generated by the P[sub r]. Therefore, the imprint is much more a bulk-related degradation phenomenon compared to the fatigue. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Voltage offset in the polarization-voltage characteristics of Pb(Zr,Ti)O[sub 3] (PZT) capacitors was evaluated by a thermal stress process. A thermally induced voltage shift occurs when heating the sample under either remanence or a saturating bias. It was found that the voltage shifts can, to a large extent, be attributed to the role of charged defects and the defect-dipole alignment throughout the films. PZT film with a high Zr/Ti ratio, i.e., rhombohedral compositions exhibited the best imprint resistance. When these films were doped wit up to 6% La, the imprint resistance was further improved. It was also found that B-site donors were more effective in minimizing the voltage shift than A-site donors. However, dopants with the same charge value as Pb, for example, Ca and Sr, did not affect the thermally induced voltage shifts of the films since they could not reduce the charged defects in the films. © 2000 American Institute of Physics. [ABSTRACT FROM AUTHOR]

The degradation behavior of integrated Pt/SrBi[sub 2]Ta[sub 2]O[sub 9]/Pt capacitors by hydrogen impregnation during the intermetal dielectric deposition and passivation is investigated. The hydrogen ions generated as a reaction byproduct from the SiH[sub 4]-based deposition processes of the dielectric films induce reduction in the remanent polarization (P[sub r]) as well as the imprint behavior of the small size capacitors (2x2 μm[sup 2]). The degree of degradation is quite dependent on the size of the individual capacitors. The smaller capacitors underwent more serious degradation implying that the hydrogen ions impregnate into the SBT layer mainly along the etched side area of the capacitors not through the top Pt electrode. Metallization adopting TiN/Al/TiN/Ti multilayer is very effective in suppressing the hydrogen impregnation. In particular, the Ti layer appears to block the hydrogen penetration. Therefore, the optimized metallization scheme, wider metal lines than the top electrode area by 1 μm, successfully protects the integrated capacitors from the hydrogen damage. 12 μC/cm2 of 2P[sub r] and 1.1 V of 2V[sub c] (coercive voltage) with an imprinting voltage of 0.16 V were obtained from the passivated 2x2 μm[sup 2] array capacitors by the optimized metallization. © 2000 American Institute of Physics. [ABSTRACT FROM AUTHOR]

The electric-field-induced rejuvenation behavior of the degraded ferroelectric properties of integrated Pt/SrBi[sub 2]Ti[sub 2]O[sub 9]/Pt capacitors was investigated. Integration processes, especially plasma-enhanced chemical vapor deposition of the passivation layers, generate hydrogen ions and electrons which act as domain pinning centers and a source of a negative internal electric field. Domain pinning was found to reduce the remanent polarization (P[sub r]) and internal field that induces an imprint to the positive bias direction. Alternating current cyclings with peak voltages of +/-6 V rejuvenated the degraded ferroelectric performance of the capacitors. Cycling with a negative bias was more effective in fixing the damage than was a positive bias. Baking at 125 °C again degraded the rejuvenated ferroelectric performance. The degree of re-degradation was also dependent on the polarity of the rejuvenating bias. The polarity-dependent behavior of rejuvenation was explained on the basis of a negative-internal-field model due to preferential capture of electrons from the plasma at the top electrodes. © 2000 American Institute of Physics. [ABSTRACT FROM AUTHOR]