Search

Low-frequency noise properties of single CuO nanowire devices were investigated under gas sensor operation conditions in dry and humid synthetic air at 350¿°C. A 1/f noise spectrum was found with the normalized power spectral density of current fluctuations typically a factor of 2 higher for humid compared to dry atmosphere. A core-shell nanowire model is proposed to treat the noise as parallel combination of gas-independent bulk and gas-dependent surface noise components. The observed increase in 1/f noise in the presence of water vapor is explained in terms of Hooge's mobility fluctuation model, where the increased surface noise component is attributed to carrier scattering at potential fluctuations due to hydroxyl groups at the nanowire surface.

Current conduction mechanism, including electron mobility, electron drift velocity (vd) and electrical break-down have been investigated in a 0.5 μm-thick (0001) InN layer grown by molecular-beam epitaxy on a GaN/sapphire template. Electron mobility (μ) of 1040 cm2/Vs and a free electron concentration (n) of 2.1 × 1018 cm−3 were measured at room temperature with only a limited change down to 20 K, suggesting scattering on dislocations and ionized impurities. Photoluminescence spectra and high-resolution X-ray diffraction correlated with the Hall experiment showing an emission peak at 0.69 eV, a full-width half-maximum of 30 meV, and a dislocation density Ndis ∼ 5.6 × 1010 cm−2. Current-voltage (I-V) characterization was done in a pulsed (10 ns-width) mode on InN resistors prepared by plasma processing and Ohmic contacts evaporation. Resistors with a different channel length ranging from 4 to 15.8 μm obeyed the Ohm law up to an electric field intensity Eknee ∼ 22 kV/cm, when vd ≥ 2.5 × 105 m/s. For higher ...

In carbon-doped GaN (GaN:C) buffers used in a GaN-on-Si technology, the buffer is embedded in between transition and channel layers. This makes the analysis of buffer properties difficult due to e.g., carrier injection from or potential drop at these adjacent layers. Here, we analyze capacitance- and current-voltage characteristics of 200–300 nm thick GaN:C ([C] = 1019 cm−3) layers which are embedded between a top metal electrode and bottom n-doped GaN (n-GaN). Such structures allow a better potential control in GaN:C and thus determination of the band diagram quantitatively. The accumulation of negative charge (concentration up to 6 × 1017 cm−3) with bias is observed in GaN:C at both polarities. For biases Vappl +1.7 V, accumulated negative charges in GaN:C raise an energy barrier of ∼1.1 eV for electron injection from n-GaN ...

Exchange of carriers between the GaN channel and the dielectric/AlGaN interface in AlGaN/GaN metal insulator semiconductor high electron mobility transistors was recently attributed to a serial process of electron transport through the AlGaN barrier and electron trapping/emission at the interface. In this paper, the time constant related to barrier transport is evaluated from the measurements of time onset of threshold voltage drift in stress-recovery experiments. Temperature and forward gate bias dependent studies reveal an activation energy of 0.65 eV for the electron transport at zero bias being consistent with the estimated potential barrier of 0.75 eV at the dielectric/AlGaN interface. Thermo-ionic emission and defect assisted tunneling to near interface states are considered as transport mechanisms.

We investigate 50 μm gate width/0.45 μm length AlGaN/GaN high-electron-mobility transistors (HEMTs) subjected to 100 ns long current pulses that simulate an electrostatic discharge. After source–drain breakdown at around 90 V, the pulsed I–V source–drain characteristic is S shaped with an abrupt snap back to about 20 V at stress current of Istress=0.2 A. Backside interferometric thermal mapping of the HEMT shows that current filamentation accompanies the transition to the low-voltage/high-current region. The shift in transistor threshold voltage is explained by electron trapping in the buffer. It is assumed that breakdown in the regime of electrostatic discharge can be explained as an avalanche-injection event that forms a current filament through the device buffer layer.

The thermal dynamics in quantum-cascade lasers under pulsed operation is investigated by a scanning interferometric thermal mapping technique. An infrared laser beam probes the change in the refractive index caused by current-induced heating of the working devices. The measured phase shift provides a quantitative information on the thermal characteristics with a micrometer spatial and a nanosecond time resolution. Comparing the experiments with a two-dimensional thermal model enables us to determine the anisotropic heat conductivity in the multilayered active region, found to be much lower than the one of bulk GaAs, as well as the temperature increase in the active region during pulsed operation.

Random telegraph signal (RTS) fluctuations with relative amplitude up to 50% are observed in forward and reverse gate current of unstressed and reverse-bias-stressed AlGaN/GaN high electron mobility transistors. Measurements of RTS amplitude and mean pulse widths as a function of forward gate bias indicate that the RTS is due to modulation of current along an intrinsic or stress-induced percolation path across the AlGaN-barrier by electron capture and emission on a trap within the barrier. Processes of electron capture from GaN to trap and subsequent tunneling to metal gate or electron exchange between GaN channel and the trap are considered.

A method for the extraction of power dissipation sources inside semiconductor devices on a nanosecond-time scale is proposed using a backside transient interferometric mapping technique. The two-dimensional power dissipation density is extracted from the time and space derivative of the measured optical phase shift. The method is applied to the analysis of moving current filaments in an electrostatic discharge protection device operating in the avalanche regime. It is found that the filament dynamics is governed by the negative temperature dependence of the impact ionization coefficient. The total power calculated from the optical measurements is in excellent agreement with the electrical input power.

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV th, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t D and barrier thickness t B, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN it, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN it is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

Using a generalized extraction method, the fixed charge density Nint at the interface between in situ deposited SiN and 5 nm thick AlGaN barrier is evaluated by measurements of threshold voltage Vth of an AlGaN/GaN metal insulator semiconductor high electron mobility transistor as a function of SiN thickness. The thickness of the originally deposited 50 nm thick SiN layer is reduced by dry etching. The extracted Nint is in the order of the AlGaN polarization charge density. The total removal of the in situ SiN cap leads to a complete depletion of the channel region resulting in Vth = +1 V. Fabrication of a gate stack with Al2O3 as a second cap layer, deposited on top of the in situ SiN, is not introducing additional fixed charges at the SiN/Al2O3 interface.

We report on an annealing-induced “gate sinking” effect in a 2-nm-thin In0.17Al0.83N/AlN barrier high electron mobility transistor with Ir gate. Investigations by transmission electron microscopy linked the effect to an oxygen containing interlayer between the gate metal and the InAlN layer and revealed diffusion of oxygen into iridium during annealing. Below 700 °C the diffusion is inhomogeneous and seems to occur along grain boundaries, which is consistent with the capacitance-voltage analysis. Annealing at 700 °C increased the gate capacitance over a factor 2, shifted the threshold voltage from +0.3 to +1 V and increased the transconductance from 400 to 640 mS/mm.

The current-voltage characteristics of the Ni/InAlN/GaN Schottky diodes were measured at various temperatures in the range of 300-700 K. The experimental data were analyzed considering different current-transport mechanisms. From the analysis it follows that the tunneling current, which might be due to a multistep tunneling along dislocations, is the dominant component at all temperatures in the samples investigated. The barrier height of the Ni/InAlN/GaN Schottky diodes, evaluated from the thermionic emission current, shows a slightly negative temperature coefficient and its value at 300 K is >= 1.46 eV. This is significantly higher barrier height than reported before (