Search

In this paper, a novel nine-level inverter topology for open-end winding induction motor is proposed. This topology requires less number of components as compared to conventional topologies. The proposed inverter uses two three-phase three-level cascade inverters to generate nine-level in the phase voltage of open-end winding induction motor. An interesting feature of this topology is that in case of failure of any three-level inverter, it can be bypassed and the proposed topology can operate in three-level mode hence reliability of the circuit is improved. Out of two three-level inverters, the inverter which operates at higher DC link voltage switches less as compared to the inverter which operates at a lower DC link voltage, thus switching losses are reduced. A 1.5-kW induction motor is run with the proposed inverter at different modulation indices, and the performance of the drive is evaluated under steady and transient states. [ABSTRACT FROM AUTHOR]

In this paper, the multilevel inverter (MLI) harmonic filter with modified modulation and advanced intelligent control scheme is described and implemented. The proposed scheme has three artificial intelligence-based controllers that are used for harmonic excerption, ripple reduction in dc capacitor voltage, and modulation, respectively. The artificial neural network (ANN) is applied for separating harmonic constituents from load, and fuzzy logic concept is utilized for dc capacitor voltage ripple minimization and current error adaptation for modulation. Further, the level-shifted multicarrier modulation is modified for balanced switching by rotating carriers for generating gate pulses for devices of inverter. The cascaded H-bridge topology of MLI is selected as filter due to its modular and compact structure. The instantaneous power theory is altered by using neural network for obtaining corrupted portion from load current and calculating reference values for compensation. The simulation model is developed by using MATLAB/SIMULINK, and hardware module is executed using dSPACE DS1103. The simulation performance is analyzed for various load conditions including transient states. The proposed topology performance is justified for its efficiency and viability through exhaustive simulation and experimentation. The total harmonic distortion in source current (THD), power factor, and voltage ripples is being used as evaluation criteria to quantify the results. [ABSTRACT FROM AUTHOR]