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In this paper, based on reversibility and approximation concepts, full adder (FA) circuits are designed for fault-tolerant applications. Area saving along with power reduction is the main objectives in the design and implementation of the proposed FAs. So, the basic reversible gates including Toffoli, Fredkin, Feynman, and Thapliyal Ranganathan (TR) are realized based on the gate diffusion input (GDI) technique. Subsequently, three approximate reversible FAs are designed with 3, 2, and 1 gates, respectively, which have special features such as 0 constant input (CI) and minimum garbage output and transistor counts. The circuitry performance and the quality of output images are extracted, when the FAs are placed in the approximate ripple carry adder (RCA) for image addition. The results show the superiority of the proposed FAs. Comprehensive results are extracted from the defined figure of merits (FoMs), which consists of area, power-delay product (PDP), peak signal-to-noise ratio (PSNR), and normalized mean error distance (NMED). The Pro-2 FA is selected as the best option due to its significant superiority compared to other circuits. The Pro-2 has 61.47% and 73.51% savings of PDP and PDP-area product (PDAP), respectively, compared to the exact circuit. [ABSTRACT FROM AUTHOR]