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In many applications of circuit design and synthesis, it is natural and in some instances essential to manipulate logic functions and model circuits using word-level representations and arithmetic operations in contrast to bit-level representations and logic operations. This paper reviews linear word-level structures and formulates their properties for combinational circuit modeling. The paper addresses the following problem: given a library of gates with their corresponding word-level representations such as linear arithmetic expressions or respective graph structures, find a word-level model of an arbitrary combinational circuit/netlist using that library of gates and minimizing memory allocation and time delay requirements. We present a comprehensive study on linearization assuming various circuit processing strategies. In particular, we develop a new approach to manipulate linear word-level representations by means of cascades. The practical applicability of linear structures and developed algorithms is strengthen by considering the problem of timing analysis. All this is supported by the experimental study on benchmark circuits. [ABSTRACT FROM AUTHOR]

Consideration was given to the problem of suboptimal control of the flight vehicle in atmosphere which was solved numerically. The results presented corroborate the efficiency of this procedure. The present paper is distinguished for the fact that the complex nonlinear boundary problem was solved using a finite number of arithmetic operations. [ABSTRACT FROM AUTHOR]

In this paper, we extend the arithmetic (AR) expressions for functions on finite dyadic groups to functions used in Fibonacci interconnection topologies. We have introduced the Fibonacci-Arithmetic (FibAR) expressions for representation of these functions. We discussed the optimization of FibARs with respect to the number of non-zero coefficients through the Fixed-Polarity FibARs defined by using different polarities for the Fibonacci variables. In this way, we provide a base to extend the application of ARs and related powerful CAD design tools for switching functions to functions in Fibonacci interconnection topologies. [ABSTRACT FROM AUTHOR]

Known algorithms for computing algebraic numbers and algorithms for arithmetic operations over them as operations over constructive real numbers are considered. It is shown that these algorithms are linear in memory. [ABSTRACT FROM AUTHOR]

The number of arithmetic operations required to determine the network reliability was estimated. Internet-like networks were considered by way of example. For the networks with edges of low and high reliability, the asymptotic formulas were derived. The calculations were based on approximating reliability by the sum of probabilities of operability of all acyclic paths or the sum of probabilities of failure of all network sections that are minimal in set-theoretical inclusion. [ABSTRACT FROM AUTHOR]

Random access memory testing by repeated application of march tests was examined. The sequence of addresses formed in each test phase with the constant test structure was used as a variable parameter. The method of the modified address sequences formation is proposed. As a difference measure of the modified address sequences arithmetic distance is used. The efficiency of detection of pattern sensitive faults is estimated depending on modification of the address sequences and their arithmetic distances. [ABSTRACT FROM AUTHOR]

Simple decision rules for constructing preferential relations in the presence of quantitative estimates on the relative importance of criteria and information that the growth of preferences decreases with the gradations on a common continuous scale. [ABSTRACT FROM AUTHOR]

New classes of Linearly Independent Ternary Arithmetic (LITA) transforms being the bases of ternary arithmetic polynomial expansions are introduced here. Recursive equations defining the LITA transforms and the corresponding butterfly diagrams are shown. Various properties and relations between introduced classes of new transforms are discussed. Computational costs to calculate LITA transforms and applications of corresponding polynomial expansions in logic design are also discussed. [ABSTRACT FROM AUTHOR]

Modular polynomial and spectral arithmetic-logical forms are introduced for representing Boolean functions so as to determine certain useful properties associated with the restricted number range (solution of the problem of large coefficients of arithmetical polynomials) in parallel logical computations. [ABSTRACT FROM AUTHOR]

Theoretical results due to V. Malyugin on linearization of arithmetical models of logical functions are interpreted and refined from the viewpoint of modern techniques of logical design of integral circuits and nearest neighbor technologies. [ABSTRACT FROM AUTHOR]

Verification methods for testing the correctness of realization of arithmetical polynomial and generalized logical forms are designed such that the verification complexity is proportional to the complexity of the initial polynomial. Verification speed is increased through multiple computations. [ABSTRACT FROM AUTHOR]