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The infrared reflectance spectra of both 4H-SiC substrates and epilayers are measured in a wave number range from 400 cm-1 to 4000 cm-1 using a Fourier-transform spectrometer. The thicknesses of the 4H-SiC epilayers and the electrical properties, including the free-carrier concentrations and the mobilities of both the 4H-SiC substrates and the epilayers, are characterized through full line-shape fitting analyses. The correlations of the theoretical spectral profiles with the 4H-SiC electrical properties in the 30 cm-1-4000 cm-1 and 400 cm-1-4000 cm-1 spectral regions are established by introducing a parameter defined as error quadratic sum. It is indicated that their correlations become stronger at a higher carrier concentration and in a wider spectral region (30 cm-1-4000 cm-1). These results suggest that the infrared reflectance technique can be used to accurately determine the thicknesses of the epilayers and the carrier concentrations, and the mobilities of both lightly and heavily doped 4H-SiC wafers. [ABSTRACT FROM AUTHOR]

The interface properties and electrical characteristics of the n-type 4H–SiC planar and trench metal–oxide–semiconductor (MOS) capacitors are investigated by measuring the capacitance voltage and current voltage. The flat-band voltage and interface state density are evaluated by the quasi-static method. It is not effective on further improving the interface properties annealing at 1250°C in NO ambient for above 1 h due to the increasing interface shallow and fast states. These shallow states reduce the effective positive fixed charge density in the oxide. For the vertical MOS capacitors on the () and () faces, the interface state density can be reduced by approximately one order of magnitude, in comparison to the result of the planar MOS capacitors on the (0001) face under the same NO annealing condition. In addition, it is found that Fowler–Nordheim tunneling current occurs at an oxide electric field of 7 MV/cm for the planar MOS device. However, Poole–Frenkel conduction current occurs at a lower electric field of 4 MV/cm for the trench MOS capacitor. This is due to the local field crowded at the trench corner severely causing the electrons to be early captured at or emitted from the SiO2/SiC interface. These results provide a reference for an in-depth understanding of the mobility-limiting factors and long term reliability of the trench and planar SiO2/SiC interfaces. [ABSTRACT FROM AUTHOR]