Search

In this work, improved RF power performance of InAlN/GaN HEMT is achieved by optimizing rapid thermal annealing (RTA) process for high performance low voltage terminal applications. By optimizing the RTA temperature and time, the optimal annealing condition is found to enable low parasitic resistance and thus high performance device. Besides, comparing with the non-optimized RTA HEMT, the optimized one demonstrates smoother ohmic metal surface morphology and better heterojunction quality including the less degraded heterojunction sheet resistance and clearer heterojunction interfaces as well as negligible material out-diffusion from the barrier to the channel and buffer. Benefitting from the lowered parasitic resistance, improved maximum output current density of 2279 mA/mm and higher peak extrinsic transconductance of 526 mS/mm are obtained for the optimized RTA HEMT. In addition, attributed to the superior heterojunction quality, the optimized HEMT shows reduced off-state leakage current of 7 × 10-3 mA/mm and suppressed current collapse of only 4%, compared with those of 1 × 10-1 mA/mm and 15% for the non-optimized one. At 8 GHz and VDS of 6 V, significantly improved power-added-efficiency of 62% and output power density of 0.71 W/mm are achieved for the optimized HEMT, as the result of the improvement in output current, knee voltage, off-state leakage current and current collapse, which reveals the large advantage of the optimized RTA HEMT in high performance low voltage terminal applications.

This paper reports a low-damage interface treatment process for AlN/GaN high-electron-mobility transistors (HEMTs) and demonstrates the excellent power characteristics of radio frequency (RF) enhancement-mode (E-mode) AlN/GaN HEMTs. An RF E-mode device fabricated by remote plasma oxidation (RPO) treatment with 2.9-nm AlN barrier layer at 300 ℃. The device with a gate length of 0.12-μm has a threshold voltage (Vth) of 0.5 V, a maximum saturation current of 1.16 A/mm, a high Ion/Ioff ratio of 1*108, and a 440 mS/mm peak transconductance. During continuous wave (CW) power testing, it demonstrated a power added efficiency of 61.9% and a power density of 1.38 W/mm at 3.6 GHz, and a power added efficiency of 41.6% and a power density of 0.85 W/mm at 30 GHz. Furthermore, RPO treatment improves the mobility of RF E-mode AlN/GaN HEMTs. All results show that the RPO processing method has good applicability for scaling ultrathin barrier E-mode AlN/GaN HEMTs for 5G compliable frequency ranging from sub-6 GHz to Ka-band.

GaN-based p-channel heterostructure field-effect transistors (p-HFETs) face significant constraints on the on-state currents compared to the n-channel high electron mobility transistors (n-HEMTs). In this work, we propose a novel double-heterostructure which introduces an additional p-GaN insertion layer into the traditional p-HFETs. The impact of the device structure on the hole densities and valence band energies of both the upper and lower channels is analyzed by using Silvaco TACD simulations, including the thickness of the upper AlGaN layer and the doping impurities and concentration in the GaN buffer layer, as well as the thickness and Mg doping concentration in the p-GaN insertion layer. With the help of the p-GaN insertion layer, the C-doping concentration in the GaN buffer layer can be reduced, while the density of two-dimensional hole gas (2DHG) in the lower channel is enhanced at the same time. This work suggests that the double heterostructure with a p-GaN insertion layer is a better approach to improve p-HFETs compared to those devices with C-doped buffer layer alone.

We demonstrate a novel Si-rich SiN bilayer passivation technology for AlGaN/GaN high electron mobility transistors (HEMTs) with thin-barrier to minimize surface leakage current to enhance the breakdown voltage. The bilayer SiN with 20-nm Si-rich SiN and 100-nm Si3N4 was deposited by plasma-enhanced chemical vapor deposition (PECVD) after removing 20-nm SiO2 pre-deposition layer. Compared to traditional Si3N4 passivation for thin-barrier AlGaN/GaN HEMTs, Si-rich SiN bilayer passivation can suppress the current collapse ratio from 18.54% to 8.40%. However, Si-rich bilayer passivation leads to a severer surface leakage current, so that it has a low breakdown voltage. The 20-nm SiO2 pre-deposition layer can protect the surface of HEMTs in fabrication process and decrease Ga–O bonds, resulting in a lower surface leakage current. In contrast to passivating Si-rich SiN directly, devices with the novel Si-rich SiN bilayer passivation increase the breakdown voltage from 29 V to 85 V. Radio frequency (RF) small-signal characteristics show that HEMTs with the novel bilayer SiN passivation leads to f T/f max of 68 GHz/102 GHz. At 30 GHz and V DS = 20 V, devices achieve a maximum P out of 5.2 W/mm and a peak power-added efficiency (PAE) of 42.2%. These results indicate that HEMTs with the novel bilayer SiN passivation can have potential applications in the millimeter-wave range.

Influences of off-state overdrive stress on the fluorine-plasma treated AlGaN/GaN high-electronic mobility transistors (HEMTs) are experimentally investigated. It is observed that the reverse leakage current between the gate and source decreases after the off-state stress, whereas the current between the gate and drain increases. By analyzing those changes of the reverse currents based on the Frenkel–Poole model, we realize that the ionization of fluorine ions occurs during the off-state stress. Furthermore, threshold voltage degradation is also observed after the off-state stress, but the degradations of AlGaN/GaN HEMTs treated with different F-plasma RF powers are different. By comparing the differences between those devices, we find that the F-ions incorporated in the GaN buffer layer play an important role in averting degradation. Lastly, suggestions to obtain a more stable fluorine-plasma treated AlGaN/GaN HEMT are put forwarded.

A novel normally-off AlGaN/GaN high-electron-mobility transistor (HEMT) with a p-GaN Schottky hybrid gate (PSHG) is proposed, and compared with the conventional p-GaN normally-off AlGaN/GaN HEMTs. This structure can be realized by selective etching of p-GaN layer, which enables the Schottky junction and PN junction to control the channel charge at the same time. The direct current (DC) and switching characteristics of the PSHG HEMTs are simulated by Slivaco TCAD, and the p-GaN HEMTs and conventional normally-on HEMTs are also simulated for comparison. The simulation results show that the PSHG HEMTs have a higher current density and a lower on-resistance than p-GaN HEMTs, which is more obvious with the decrease of p-GaN ratios of the PSHG HEMTs. The breakdown voltage and threshold voltage of the PSHG HEMTs are very close to those of the p-GaN HEMTs. In addition, the PSHG HEMTs have a higher switching speed than the conventional normally-on HEMTs, and the p-GaN layer ratio has no obvious effect on the switching speed.

The N2O radicals in-situ treatment on gate region has been employed to improve device performance of recessed-gate AlGaN/GaN high-electron-mobility transistors (HEMTs). The samples after gate recess etching were treated by N2O radicals without physical bombardment. After in-situ treatment (IST) processing, the gate leakage currents decreased by more than one order of magnitude compared to the sample without IST. The fabricated HEMTs with the IST process show a low reverse gate current of 10−9 A/mm, high on/off current ratio of 108, and high f T × L g of 13.44 GHz⋅μm. A transmission electron microscope (TEM) imaging illustrates an oxide layer with a thickness of 1.8 nm exists at the AlGaN surface. X-ray photoelectron spectroscopy (XPS) measurement shows that the content of the Al–O and Ga–O bonds elevated after IST, indicating that the Al–N and Ga–N bonds on the AlGaN surface were broken and meanwhile the Al–O and Ga–O bonds formed. The oxide formed by a chemical reaction between radicals and the surface of the AlGaN barrier layer is responsible for improved device characteristics.

A GaN-based high electron mobility transistor (HEMT) with p-GaN islands buried layer (PIBL) for terahertz applications is proposed. The introduction of a p-GaN island redistributes the electric field in the gate–drain channel region, thereby promoting the formation of electronic domains in the two-dimensional electron gas (2DEG) channel. The formation and regulation mechanism of the electronic domains in the device are investigated using Silvaco-TCAD software. Simulation results show that the 0.2 μm gate HEMT with a PIBL structure having a p-GaN island doping concentration (N p) of 2.5 × 1018 cm−3–3 × 1018 cm−3 can generate stable oscillations up to 344 GHz–400 GHz under the gate–source voltage (V gs) of 0.6 V. As the distance (D p) between the p-GaN island and the heterojunction interface increases from 5 nm to 15 nm, the fundamental frequency decreases from 377 GHz to 344 GHz, as well as the ratio of oscillation current amplitude of the fundamental component to the average component I f/I avg ranging from 2.4% to 3.84%.

An atomic-level controlled etching (ACE) technology is invstigated for the fabrication of recessed gate AlGaN/GaN high-electron-mobility transistors (HEMTs) with high power added efficiency. We compare the recessed gate HEMTs with conventional etching (CE) based chlorine, Cl2-only ACE and BCl3/Cl2 ACE, respectively. The mixed radicals of BCl3/Cl2 were used as the active reactants in the step of chemical modification. For ensuring precise and controllable etching depth and low etching damage, the kinetic energy of argon ions was accurately controlled. These argon ions were used precisely to remove the chemical modified surface atomic layer. Compared to the HEMTs with CE, the characteristics of devices fabricated by ACE are significantly improved, which benefits from significant reduction of etching damage. For BCl3/Cl2 ACE recessed HEMTs, the load pull test at 17 GHz shows a high power added efficiency (PAE) of 59.8% with an output power density of 1.6 W/mm at V d = 10 V, and a peak PAE of 44.8% with an output power density of 3.2 W/mm at V d = 20 V in a continuous-wave mode.

We demonstrated an AlGaN/GaN high electron mobility transistor (HEMT) namely double-V th coupling HEMT (DVC-HEMT) fabricated by connecting different threshold voltage (V th) values including the slant recess element and planar element in parallel along the gate width with N2O plasma treatment on the gate region. The comparative studies of DVC-HEMT and Fin-like HEMT fabricated on the same wafer show significantly improved linearity of transconductance (G m) and radio frequency (RF) output signal characteristics in DVC-HEMT. The fabricated device shows the transconductance plateau larger than 7 V, which yields a flattened f T/f max-gate bias dependence. At the operating frequency of 30 GHz, the peak power-added efficiency (PAE) of 41% accompanied by the power density (P out) of 5.3 W/mm. Furthermore, the proposed architecture also features an exceptional linearity performance with 1-dB compression point (P 1 dB) of 28 dBm, whereas that of the Fin-like HEMT is 25.2 dBm. The device demonstrated in this article has great potential to be a new paradigm for millimeter-wave application where high linearity is essential.

Ultra-thin barrier (UTB) 4-nm-AlGaN/GaN normally-off high electron mobility transistors (HEMTs) having a high current gain cut-off frequency (f T) are demonstrated by the stress-engineered compressive SiN trench technology. The compressive in-situ SiN guarantees the UTB-AlGaN/GaN heterostructure can operate a high electron density of 1.27 × 1013 cm−2, a high uniform sheet resistance of 312.8 Ω/□, but a negative threshold for the short-gate devices fabricated on it. With the lateral stress-engineering by full removing in-situ SiN in the 600-nm SiN trench, the short-gated (70 nm) devices obtain a threshold of 0.2 V, achieving the devices operating at enhancement-mode (E-mode). Meanwhile, the novel device also can operate a large current of 610 mA/mm and a high transconductance of 394 mS/mm for the E-mode devices. Most of all, a high f T/f max of 128 GHz/255 GHz is obtained, which is the highest value among the reported E-mode AlGaN/GaN HEMTs. Besides, being together with the 211 GHz/346 GHz of f T/f max for the D-mode HEMTs fabricated on the same materials, this design of E/D-mode with the realization of f max over 200 GHz in this work is the first one that can be used in Q-band mixed-signal application with further optimization. And the minimized processing difference between the E- and D-mode designs the addition of the SiN trench, will promise an enormous competitive advantage in the fabricating costs.

The performance degradation of gate-recessed metal–oxide–semiconductor high electron mobility transistor (MOS-HEMT) is compared with that of conventional high electron mobility transistor (HEMT) under direct current (DC) stress, and the degradation mechanism is studied. Under the channel hot electron injection stress, the degradation of gate-recessed MOS-HEMT is more serious than that of conventional HEMT devices due to the combined effect of traps in the barrier layer, and that under the gate dielectric of the device. The threshold voltage of conventional HEMT shows a reduction under the gate electron injection stress, which is caused by the barrier layer traps trapping the injected electrons and releasing them into the channel. However, because of defects under gate dielectrics which can trap the electrons injected from gate and deplete part of the channel, the threshold voltage of gate-recessed MOS-HEMT first increases and then decreases as the conventional HEMT. The saturation phenomenon of threshold voltage degradation under high field stress verifies the existence of threshold voltage reduction effect caused by gate electron injection.

PbZr0.2Ti0.8O3 (PZT) gate insulator with the thickness of 30 nm is grown by pulsed laser deposition (PLD) in AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs). The ferroelectric effect of PZT AlGaN/GaN MIS-HEMT is demonstrated. The polarization charge in PZT varies with different gate voltages. The equivalent polarization charge model (EPCM) is proposed for calculating the polarization charge and the concentration of two-dimensional electron gas (2DEG). The threshold voltage (V th) and output current density (I DS) can also be obtained by the EPCM. The theoretical values are in good agreement with the experimental results and the model can provide a guide for the design of the PZT MIS-HEMT. The polarization charges of PZT can be modulated by different gate-voltage stresses and the V th has a regulation range of 4.0 V. The polarization charge changes after the stress of gate voltage for several seconds. When the gate voltage is stable or changes at high frequency, the output characteristics and the current collapse of the device remain stable.

The effects of various notch structures on direct current (DC) and radio frequency (RF) performances of AlGaN/GaN high electron mobility transistors (HEMTs) are analyzed. The AlGaN/GaN HEMTs, each with a 0.8-μm gate length, 50-μm gate width, and 3-μm source–drain distance in various notch structures at the AlGaN/GaN barrier layer, are manufactured to achieve the desired DC and RF characteristics. The maximum drain current (I ds,max), pinch-off voltage (V th), maximum transconductance (g m), gate voltage swing (GVS), subthreshold current, gate leakage current, pulsed I–V characteristics, breakdown voltage, cut-off frequency (f T), and maximum oscillation frequency (f max) are investigated. The results show that the double-notch structure HEMT has a 30% improvement of gate voltage swing, a 42.2% improvement of breakdown voltage, and a 9% improvement of cut-off frequency compared with the conventional HEMT. The notch structure also has a good suppression of the current collapse.

Trapping effect in normally-off Al2O3/AlGaN/GaN metal–oxide–semiconductor (MOS) high-electron-mobility transistors (MOS-HEMTs) with post-etch surface treatment was studied in this paper. Diffusion-controlled interface oxidation treatment and wet etch process were adopted to improve the interface quality of MOS-HEMTs. With capacitance–voltage (C–V) measurement, the density of interface and border traps were calculated to be 1.13 × 1012 cm−2 and 6.35 × 1012 cm−2, effectively reduced by 27% and 14% compared to controlled devices, respectively. Furthermore, the state density distribution of border traps with large activation energy was analyzed using photo-assisted C–V measurement. It is found that irradiation of monochromatic light results in negative shift of C–V curves, which indicates the electron emission process from border traps. The experimental results reveals that the major border traps have an activation energy about 3.29 eV and the change of post-etch surface treatment process has little effect on this major activation energy.

A high performance InAlN/GaN high electron mobility transistor (HEMT) at low voltage operation (6–10 V drain voltage) has been fabricated. An 8 nm InAlN barrier layer is adopted to generate large 2DEG density thus to reduce sheet resistance. Highly scaled lateral dimension (1.2 μm source–drain spacing) is to reduce access resistance. Both low sheet resistance of the InAlN/GaN structure and scaled lateral dimension contribute to an high extrinsic transconductance of 550 mS/mm and a large drain current of 2.3 A/mm with low on-resistance (R on) of 0.9 Ω⋅mm. Small signal measurement shows an f T/f max of 131 GHz/196 GHz. Large signal measurement shows that the InAlN/GaN HEMT can yield 64.7%–52.7% (V ds = 6–10 V) power added efficiency (PAE) associated with 1.6–2.4 W/mm output power density at 8 GHz. These results demonstrate that GaN-based HEMTs not only have advantages in the existing high voltage power and high frequency rf field, but also are attractive for low voltage mobile compatible rf applications.

The etch-stop structure including the in-situ SiN and AlGaN/GaN barrier is proposed for high frequency applications. The etch-stop process is realized by placing an in-situ SiN layer on the top of the thin AlGaN barrier. F-based etching can be self-terminated after removing SiN, leaving the AlGaN barrier in the gate region. With this in-situ SiN and thin barrier etch-stop structure, the short channel effect can be suppressed, meanwhile achieving highly precisely controlled and low damage etching process. The device shows a maximum drain current of 1022 mA/mm, a peak transconductance of 459 mS/mm, and a maximum oscillation frequency (f max) of 248 GHz.

We investigate the instability of threshold voltage in D-mode MIS-HEMT with in-situ SiN as gate dielectric under different negative gate stresses. The complex non-monotonic evolution of threshold voltage under the negative stress and during the recovery process is induced by the combination effect of two mechanisms. The effect of trapping behavior of interface state at SiN/AlGaN interface and the effect of zener traps in AlGaN barrier layer on the threshold voltage instability are opposite to each other. The threshold voltage shifts negatively under the negative stress due to the detrapping of the electrons at SiN/AlGaN interface, and shifts positively due to zener trapping in AlGaN barrier layer. As the stress is removed, the threshold voltage shifts positively for the retrapping of interface states and negatively for the thermal detrapping in AlGaN. However, it is the trapping behavior in the AlGaN rather than the interface state that results in the change of transconductance in the D-mode MIS-HEMT.

In this paper, the interface states of the AlGaN/GaN metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs) with an Al2O3 gate dielectric are systematically evaluated. By frequency-dependent capacitance and conductance measurements, trap density and time constant at Al2O3/AlGaN and AlGaN/GaN interface are determined. The experimental results reveal that the density of trap states and the activation energy at the Al2O3/AlGaN interface are much higher than at the AlGaN/GaN interface. The photo-assisted capacitance-voltage measurements are performed to characterize the deep-level traps located near mid-gap at the Al2O3/AlGaN interface, which indicates that a density of deep-level traps is lower than the density of the shallow-level states.

This paper concentrates on the impact of SiN passivation layer deposited by plasma-enhanced chemical vapor deposition (PECVD) on the Schottky characteristics in GaN high electron mobility transistors (HEMTs). Three types of SiN layers with different deposition conditions were deposited on GaN HEMTs. Atomic force microscope (AFM), capacitance–voltage (C–V), and Fourier transform infrared (FTIR) measurement were used to analyze the surface morphology, the electrical characterization, and the chemical bonding of SiN thin films, respectively. The better surface morphology was achieved from the device with lower gate leakage current. The fixed positive charge Q f was extracted from C–V curves of Al/SiN/Si structures and quite different density of trap states (in the order of magnitude of 1011–1012 cm−2) was observed. It was found that the least trap states were in accordance with the lowest gate leakage current. Furthermore, the chemical bonds and the %H in Si–H and N–H were figured from FTIR measurement, demonstrating an increase in the density of Q f with the increasing %H in N–H. It reveals that the effect of SiN passivation can be improved in GaN-based HEMTs by modulating %H in Si–H and N–H, thus achieving a better Schottky characteristics.

In this work, AlGaN/GaN FinFETs with different fin widths have been successfully fabricated, and the recessed-gate FinFETs are fabricated for comparison. The recessed-gate FinFETs exhibit higher transconductance value and positive shift of threshold voltage. Moreover, with the fin width of the recessed-gate FinFETs increasing, the variations of both threshold voltage and the transconductance increase. Next, transfer characteristics of the recessed-gate FinFETs with different fin widths and recessed-gate depths are simulated by Silvaco software. The relationship between the threshold voltage and the AlGaN layer thickness has been investigated. The simulation results indicate that the slope of threshold voltage variation reduces with the fin width decreasing. Finally, a simplified threshold voltage model for recessed-gate FinFET is established, which agrees with both the experimental results and simulation results.

A novel GaN-based vertical heterostructure field effect transistor (HFET) with nonuniform doping superjunctions (non-SJ HFET) is proposed and studied by Silvaco-ATLAS, for minimizing the specific on-resistance (R on A) at no expense of breakdown voltage (BV). The feature of non-SJ HFET lies in the nonuniform doping concentration from top to bottom in the n- and p-pillars, which is different from that of the conventional GaN-based vertical HFET with uniform doping superjunctions (un-SJ HFET). A physically intrinsic mechanism for the nonuniform doping superjunction (non-SJ) to further reduce R on A at no expense of BV is investigated and revealed in detail. The design, related to the structure parameters of non-SJ, is optimized to minimize the R on A on the basis of the same BV as that of un-SJ HFET. Optimized simulation results show that the reduction in R on A depends on the doping concentrations and thickness values of the light and heavy doping parts in non-SJ. The maximum reduction of more than 51% in R on A could be achieved with a BV of 1890 V. These results could demonstrate the superiority of non-SJ HFET in minimizing R on A and provide a useful reference for further developing the GaN-based vertical HFETs.

The new electrical degradation phenomenon of the AlGaN/GaN high electron mobility transistor (HEMT) treated by low power fluorine plasma is discovered. The saturated current, on-resistance, threshold voltage, gate leakage and breakdown voltage show that each experiences a significant change in a short time stress, and then keeps unchangeable. The migration phenomenon of fluorine ions is further validated by the electron redistribution and breakdown voltage enhancement after off-state stress. These results suggest that the low power fluorine implant ion stays in an unstable state. It causes the electrical properties of AlGaN/GaN HEMT to present early degradation. A new migration and degradation mechanism of the low power fluorine implant ion under the off-stress electrical stress is proposed. The low power fluorine ions would drift at the beginning of the off-state stress, and then accumulate between gate and drain nearby the gate side. Due to the strong electronegativity of fluorine, the accumulation of the front fluorine ions would prevent the subsequent fluorine ions from drifting, thereby alleviating further the degradation of AlGaN/GaN HEMT electrical properties.

A novel AlGaN/GaN high electron mobility transistor (HEMT) with a source-connected T-shaped field-plate (ST-FP HEMT) is proposed for the first time in this paper. The source-connected T-shaped field-plate (ST-FP) is composed of a source-connected field-plate (S-FP) and a trench metal. The physical intrinsic mechanisms of the ST-FP to improve the breakdown voltage and the FP efficiency and to modulate the distributions of channel electric field and potential are studied in detail by means of two-dimensional numerical simulations with Silvaco-ATLAS. A comparison to the HEMT and the HEMT with an S-FP (S-FP HEMT) shows that the ST-FP HEMT could achieve a broader and more uniform channel electric field distribution with the help of a trench metal, which could increase the breakdown voltage and the FP efficiency remarkably. In addition, the relationship between the structure of the ST-FP, the channel electric field, the breakdown voltage as well as the FP efficiency in ST-FP HEMT is analyzed. These results could open up a new effective method to fabricate high voltage power devices for the power electronic applications.

A novel and accurate method is proposed to extract the intrinsic elements of the GaN high-electron-mobility transistor (HEMT) switch. The new extraction method is verified by comparing the simulated S-parameters with the measured data over the 5–40 GHz frequency range. The percentage errors Eij within 3.83% show the great agreement between the simulated S-parameters and the measured data.

In this paper, the enhancement-mode AlGaN/GaN HEMT combined with the low damage recessed-gate etching and the optimized oxygen plasma treatment was fabricated. Scanning electron microscope/energy dispersive spectrometer (SEM/EDS) method and x-ray photoelectron spectroscopy (XPS) method were used to confirm the formation of oxides. Based on the experimental results, the obtained enhancement-mode HEMT exhibited a threshold voltage of 0.5 V, a high peak transconductance of 210 mS/mm, and a maximum drain current of 610 mA/mm at the gate bias of 4 V. Meanwhile, the on/off current ratio of enhancement-mode HEMT was as high as 108, drain induced barrier lowering (DIBL) was as low as 5 mV/V, and subthreshold swing (SS) of 80 mV/decade was obtained. Compared with the conventional HEMT, the Schottky reverse current of enhancement-mode HEMT was three orders of magnitude lower, and the off-state breakdown voltage of which was higher. In addition, a power gain cutoff frequency (f max) of the enhancement-mode HEMT was larger than that of the conventional one.

The effects of gate length LG on breakdown voltage VBR are investigated in AlGaN/GaN high-electron-mobility transistors (HEMTs) with LG = 1 μm~ 20 μm. With the increase of LG, VBR is first increased, and then saturated at LG = 3 μm. For the HEMT with LG = 1 μm, breakdown voltage VBR is 117 V, and it can be enhanced to 148 V for the HEMT with LG = 3 μm. The gate length of 3 μm can alleviate the buffer-leakage-induced impact ionization compared with the gate length of 1 μm, and the suppression of the impact ionization is the reason for improving the breakdown voltage. A similar suppression of the impact ionization exists in the HEMTs with LG > 3 μm. As a result, there is no obvious difference in breakdown voltage among the HEMTs with LG = 3 μm~20 μm, and their breakdown voltages are in a range of 140 V–156 V.

In this paper the trapping effects in Al2O3/In0.17Al0.83N/GaN MOS-HEMT (here, HEMT stands for high electron mobility transistor) are investigated by frequency-dependent capacitance and conductance analysis. The trap states are found at both the Al2O3/InAlN and InAlN/GaN interface. Trap states in InAlN/GaN heterostructure are determined to have mixed de-trapping mechanisms, emission, and tunneling. Part of the electrons captured in the trap states are likely to tunnel into the two-dimensional electron gas (2DEG) channel under serious band bending and stronger electric field peak caused by high Al content in the InAlN barrier, which explains the opposite voltage dependence of time constant and relation between the time constant and energy of the trap states.

Frequency-dependent conductance measurements were carried out to investigate the trap states induced by reactive ion etching in AlGaN/GaN high-electron-mobility transistors (HEMTs) quantitatively. For the non-recessed HEMT, the trap state density decreases from 2.48 × 1013 cm−2eV−1 at an energy of 0.29 eV to 2.79 × 1012 cm−2eV−1 at ET = 0.33 eV. In contrast, the trap state density of 2.38 × 1013–1.10 × 1014 cm−2eV−1 is located at ET in a range of 0.30–0.33 eV for the recessed HEMT. Thus, lots of trap states with shallow energy levels are induced by the gate recess etching. The induced shallow trap states can be changed into deep trap states by 350 °C annealing process. As a result, there are two different types of trap sates, fast and slow, in the annealed HEMT. The parameters of the annealed HEMT are ET = 0.29–0.31 eV and DT = 8.16 × 1012–5.58 × 1013 cm−2eV−1 for the fast trap states, and ET = 0.37–0.45 eV and DT = 1.84 × 1013 − 8.50 × 1013 cm−2eV−1 for the slow trap states. The gate leakage currents are changed by the etching and following annealing process, and this change can be explained by the analysis of the trap states.

Negative bias temperature instability (NBTI) has become a serious reliability issue, and the interface traps and oxide charges play an important role in the degradation process. In this paper, we study the recovery of NBTI systemically under different conditions in the P-type metal–oxide–semiconductor field effect transistor (PMOSFET), explain the various recovery phenomena, and find the possible processes of the recovery.

The appearance of third-generation semiconductors represented by gallium nitride (GaN) material greatly improves the output power of a power amplifier (PA), but the efficiency of the PA needs to be further improved. The Class-F PA reduces the overlap of drain voltage and current by tuning harmonic impedance so that high efficiency is achieved. This paper begins with the principle of class-F PA, regards the third harmonic voltage as an independent variable, analyzes the influence of the third harmonic on fundamental, and points out how drain efficiency and output power vary with the third harmonic voltage with an I?V knee effect. Finally, the best third harmonic impedance is found mathematically. We compare our results with the Loadpull technique in advanced design system environment and conclude that an optimized third harmonic impedance is open in an ideal case, while it is not at an open point with the I?V knee effect, and the drain efficiency with optimized third harmonic impedance is 4% higher than that with the third harmonic open.

The transport mechanism of reverse surface leakage current in the AlGaN/GaN high-electron mobility transistor (HEMT) becomes one of the most important reliability issues with the downscaling of feature size. In this paper, the research results show that the reverse surface leakage current in AlGaN/GaN HEMT with SiN passivation increases with the enhancement of temperature in the range from 298 K to 423 K. Three possible transport mechanisms are proposed and examined to explain the generation of reverse surface leakage current. By comparing the experimental data with the numerical transport models, it is found that neither Fowler–Nordheim tunneling nor Frenkel–Poole emission can describe the transport of reverse surface leakage current. However, good agreement is found between the experimental data and the two-dimensional variable range hopping (2D-VRH) model. Therefore, it is concluded that the reverse surface leakage current is dominated by the electron hopping through the surface states at the barrier layer. Moreover, the activation energy of surface leakage current is extracted, which is around 0.083 eV. Finally, the SiN passivated HEMT with a high Al composition and a thin AlGaN barrier layer is also studied. It is observed that 2D-VRH still dominates the reverse surface leakage current and the activation energy is around 0.10 eV, which demonstrates that the alteration of the AlGaN barrier layer does not affect the transport mechanism of reverse surface leakage current in this paper.

The influence of an N2O plasma pre-treatment technique on characteristics of AlGaN/GaN high electron mobility transistor (HEMT) prepared by using a plasma-enhanced chemical vapor deposition (PECVD) system is presented. After the plasma treatment, the peak transconductance (gm) increases from 209 mS/mm to 293 mS/mm. Moreover, it is observed that the reverse gate leakage current is lowered by one order of magnitude and the drain current dispersion is improved in the plasma-treated device. From the analysis of frequency-dependent conductance, it can be seen that the trap state density (DT) and time constant (τT) of the N2O-treated device are smaller than those of a non-treated device. The results indicate that the N2O plasma pre-pretreatment before the gate metal deposition could be a promising approach to enhancing the performance of the device.

The degradation mechanism of enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs) fabricated by fluorine plasma ion implantation technology is one major concern of HEMT’s reliability. It is observed that the threshold voltage shows a significant negative shift during the typical long-term on-state gate overdrive stress. The degradation does not originate from the presence of as-grown traps in the AlGaN barrier layer or the generated traps during fluorine ion implantation process. By comparing the relationships between the shift of threshold voltage and the cumulative injected electrons under different stress conditions, a good agreement is observed. It provides direct experimental evidence to support the impact ionization physical model, in which the degradation of E-mode HEMTs under gate overdrive stress can be explained by the ionization of fluorine ions in the AlGaN barrier layer by electrons injected from 2DEG channel. Furthermore, our results show that there are few new traps generated in the AlGaN barrier layer during the gate overdrive stress, and the ionized fluorine ions cannot recapture the electrons.

The influence of PMOSFET gate length on the parameter degradation relations under negative bias temperature instability (NBTI) stress is studied. The threshold voltage degradation increases with reducing the gate length. By calculating the relations between the threshold voltage and the linear/saturation drain current, we obtain their correlation coefficients. Comparing the test result with the calculated linear/saturation current value, we obtain the ratio factors. The ratio factors decrease differently when the gate length diminishes. When the gate length reduces to some degree, the linear ratio factor decreases from greater than 1 to nearly 1, but the saturation factor decreases from greater than 1 to smaller than 1. This results from the influence of mobility and the velocity saturation effect. Moreover, due to the un-uniform distribution of potential damages along the channel, the descending slopes of the curve are different.

In this paper, the bipolar resistive switching characteristic is reported in Ti/ZrO2/Pt resistive switching memory devices. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament composed of oxygen vacancies. The conduction mechanisms for low and high resistance states are dominated by the ohmic conduction and the trap-controlled space charge limited current (SCLC) mechanism, respectively. The effect of a set compliance current on the switching parameters is also studied: the low resistance and reset current are linearly dependent on the set compliance current in the log—log scale coordinate; and the set and reset voltage increase slightly with the increase of the set compliance current. A series circuit model is proposed to explain the effect of the set compliance current on the resistive switching behaviors.

In this paper, we demonstrate that a Schottky drain can improve the forward and reverse blocking voltages (BVs) simultaneously in AlGaN/GaN high-electron mobility transistors (HEMTs). The mechanism of improving the two BVs is investigated by analysing the leakage current components and by software simulation. The forward BV increases from 72 V to 149 V due to the good Schottky contact morphology. During the reverse bias, the buffer leakage in the Ohmicdrain HEMT increases significantly with the increase of the negative drain bias. For the Schottky-drain HEMT, the buffer leakage is suppressed effectively by the formation of the depletion region at the drain terminal. As a result, the reverse BV is enhanced from −5 V to −49 V by using a Schottky drain. Experiments and the simulation indicate that a Schottky drain is desirable for power electronic applications.

In this paper, we present the combination of drain field plate (FP) and Schottky drain to improve the reverse blocking capability, and investigate the reverse blocking enhancement of drain FP in Schottky-drain AlGaN/GaN high-electron mobility transistors (HEMTs). Drain FP and gate FP were employed in a two-dimensional simulation to improve the reverse blocking voltage (VRB) and the forward blocking voltage (VFB). The drain-FP length, the gate-FP length and the passivation layer thickness were optimized. VRB and VFB were improved from −67 V and 134 V to −653 V and 868 V respectively after optimization. Simulation results suggest that the combination of drain FP and Schottky drain can enhance the reverse blocking capability significantly.

The behavior of Schottky contacts in AlGaN/GaN high electron mobility transistors (HEMTs) is investigated by temperature-dependent current—voltage (T—I—V) measurements from 300 K to 473 K. The ideality factor and barrier height determined based on the thermionic emission (TE) theory are found to be strong functions of temperature, while present a great deviation from the theoretical value, which can be expounded by the barrier height inhomogeneities. In order to determine the forward current transport mechanisms, the experimental data are analyzed using numerical fitting method, considering the temperature-dependent series resistance. It is observed that the current flow at room temperature can be attributed to the tunneling mechanism, while thermionic emission current gains a growing proportion with an increase in temperature. Finally, the effective barrier height is derived based on the extracted thermionic emission component, and an evaluation of the density of dislocations is made from the I—V characteristics, giving a value of 1.49 × 107 cm−2.

In this paper, a new current expression based on both the direct currect (DC) characteristics of the AlGaN/GaN high election mobility transistor (HEMT) and the hyperbolic tangent function tanh is proposed, by which we can describe the kink effect of the AlGaN/GaN HEMT well. Then, an improved EEHEMT model including the proposed current expression is presented. The simulated and measured results of I–V, S-parameter, and radio frequency (RF) large-signal characteristics are compared for a self-developed on-wafer AlGaN/GaN HEMT with ten gate fingers each being 0.4-μm long and 125-μm wide (Such an AlGaN/GaN HEMT is denoted as AlGaN/GaN HEMT (10 × 125 μm)). The improved large signal model simulates the I–V characteristic much more accurately than the original one, and its transconductance and RF characteristics are also in excellent agreement with the measured data.

The kink effect in current—voltage (IV) characteristic s seriously deteriorates the performance of a GaN-based HEMT. Based on a series of direct current (DC) IV measurements in a GaN-based HEMT with an AlGaN back barrier, a possible mechanism with electron-trapping and detrapping processes is proposed. Kink-related deep levels are activated by a high drain source voltage (Vds) and located in a GaN channel layer. Both electron trapping and detrapping processes are accomplished with the help of hot electrons from the channel by impact ionization. Moreover, the mechanism is verified by two other DC IV measurements and a model with an expression of the kink current.

This paper gives a detailed analysis of the time-dependent degradation of the threshold voltage in AlGaN/GaN high electron mobility transistors (HEMTs) submitted to off-state stress. The threshold voltage shows a positive shift in the early stress, then turns to a negative shift. The negative shift of the threshold voltage seems to have a long recovery time. A model related with the balance of electron trapping and detrapping induced by shallow donors and deep acceptors is proposed to explain this degradation mode.

In this paper, the influence of a drain field plate (FP) on the forward blocking characteristics of an AlGaN/GaN high electron mobility transistor (HEMT) is investigated. The HEMT with only a gate FP is optimized, and breakdown voltage VBR is saturated at 1085 V for gate—drain spacing LGD ≥ 8 μm. On the basis of the HEMT with a gate FP, a drain FP is added with LGD = 10 μm. For the length of the drain FP LDF ≤ 2 μm, VBR is almost kept at 1085 V, showing no degradation. When LDF exceeds 2 μm, VBR decreases obviously as LDF increases. Moreover, the larger the LDF, the larger the decrease of VBR. It is concluded that the distance between the gate edge and the drain FP edge should be larger than a certain value to prevent the drain FP from affecting the forward blocking voltage and the value should be equal to the LGD at which VBR begins to saturate in the first structure. The electric field and potential distribution are simulated and analyzed to account for the decrease of VBR.

A novel source-connected field plate structure, featuring the same photolithography mask as the gate electrode, is proposed as an improvement over the conventional field plate (FP) techniques to enhance the frequency performance in GaN-based HEMTs. The influences of the field plate on frequency and breakdown performance are investigated simultaneously by using a two-dimensional physics-based simulation. Compared with the conventional T-gate structures with a field plate length of 1.2 μm, this field plate structure can induce the small signal power gain at 10 GHz to increase by 5-9.5 dB, which depends on the distance between source FP and dramatically shortened gate FP. This technique minimizes the parasitic capacitances, especially the gate-to-drain capacitance, showing a substantial potential for millimeter-wave, high power applications.

The hot carrier effect (HCE) of an ultra-deep sub-micron p-channel metal—oxide semiconductor field-effect transistor (pMOSFET) is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time (t), channel width (W), channel length (L), and stress voltage (Vd) is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly.

Self-heating in a multifinger AlGaN/GaN high electron mobility transistor (HEMT) is investigated by micro-Raman spectroscopy. The device temperature is probed on the die as a function of applied bias. The operating temperature of the AlGaN/GaN HEMT is estimated from the calibration curve of a passively heated AlGaN/GaN structure. A linear increase of junction temperature is observed when direct current dissipated power is increased. When the power dissipation is 12.75 W at a drain voltage of 15 V, a peak temperature of 69.1 °C is observed at the gate edge on the drain side of the central finger. The position of the highest temperature corresponds to the high-field region at the gate edge.

AlGaN/GaN high electron mobility transistors (HEMTs) were exposed to 1 MeV neutron irradiation at a neutron fluence of 1 × 1015 cm−2. The dc characteristics of the devices, such as the drain saturation current and the maximum transconductance, decreased after neutron irradiation. The gate leakage currents increased obviously after neutron irradiation. However, the rf characteristics, such as the cut-off frequency and the maximum frequency, were hardly affected by neutron irradiation. The AlGaN/GaN heterojunctions have been employed for the better understanding of the degradation mechanism. It is shown in the Hall measurements and capacitance—voltage tests that the mobility and concentration of two-dimensional electron gas (2DEG) decreased after neutron irradiation. There was no evidence of the full-width at half-maximum of X-ray diffraction (XRD) rocking curve changing after irradiation, so the dislocation was not influenced by neutron irradiation. It is concluded that the point defects induced in AlGaN and GaN by neutron irradiation are the dominant mechanisms responsible for performance degradations of AlGaN/GaN HEMT devices.

A GaN/Al0.3Ga0.7N/AlN/GaN high-electron mobility transistor utilizing a field plate (with a 0.3 μm overhang towards the drain and a 0.2 μm overhang towards the source) over a 165-nm sputtered HfO2 insulator (HfO2-FP-HEMT) is fabricated on a sapphire substrate. Compared with the conventional field-plated HEMT, which has the same geometric structure but uses a 60-nm SiN insulator beneath the field plate (SiN-FP-HEMT), the HfO2-FP-HEMT exhibits a significant improvement of the breakdown voltage (up to 181 V) as well as a record field-plate efficiency (up to 276 V/μm). This is because the HfO2 insulator can further improve the modulation of the field plate on the electric field distribution in the device channel, which is proved by the numerical simulation results. Based on the simulation results, a novel approach named the proportional design is proposed to predict the optimal dielectric thickness beneath the field plate. It can simplify the field-plated HEMT design significantly.