16 results on '"Gu-Yeon Wei"'
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2. A fully integrated battery-connected switched-capacitor 4: 1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling.
3. Supply-noise resilient adaptive clocking for battery-powered aerial microrobotic System-on-Chip in 40nm CMOS.
4. Area efficient phase calibration of a 1.6 GHz multiphase DLL.
5. Design-space exploration of backplane receivers with high-speed ADCs and digital equalization.
6. A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS.
7. A 8×5 Gb/s source-synchronous receiver with clock generator phase error correction.
8. Digitally-Enhanced Phase-Locking Circuits.
9. A Comprehensive Phase-Transfer Model for Delay-Locked Loops.
10. A High-Throughput Maximum a posteriori Probability Detector.
11. Pulsenet - A Parallel Flash Sampler and Digital Processor IC for Optical SETI.
12. Phase Mismatch Detection and Compensation for PLL/DLL Based Multi-Phase Clock Generator.
13. A 1.6Gbps Digital Clock and Data Recovery Circuit.
14. Adaptive-Bandwidth Mixing PLL/DLL Based Multi-Phase Clock Generator for Optimal Jitter Performance.
15. An adaptive PAM-4 5 Gb/s backplane transceiver in 0.25 μm CMOS.
16. Digital wireline and PLL techniques.
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