Search

The technology development, combined with chip size reductions, has significantly increased power density. Furthermore, the power limitation in portable devices has increased the importance of power consumption considerably. Approximate computing as an emerging paradigm leverages the error resiliency of applications to decrease power consumption. In this paper, we propose four approximate 4:2 compressors. We utilize the gate diffusion input to achieve significant area reduction in the proposed compressors. Afterward, we employ these compressors in the structure of Dadda multipliers. Compared to the state-of-the-art works, the proposed compressors result in, on average, 45% and 42% higher accuracy and lower area, respectively. Circuit simulations were carried out at a 32-nm carbon nanotube field-effect transistor technology node by HSPICE. The comparisons between our proposed compressors and exact compressor indicate that there has been an average improvement of 55%, 60% and 46% in the number of transistors, power consumption, and delay, respectively. In addition, the proposed multipliers were used in three image processing applications, including image multiplication, sharpening, and smoothing. The results show up to 46% and 70% improvement in the mean structure similarity index metric and peak signal-to-noise ratio compared to the state-of-the-art. [ABSTRACT FROM AUTHOR]

This paper introduces a 10T single-ended SRAM cell with high stability and low static power. The read static noise margin is augmented by using a Schmitt-trigger inverter and decoupling the storage node from the read bitline by adding one transistor. Since writing "1" is difficult in single-ended SRAM cells, using proper capacitive coupling and also extra pMOS transistor as an access transistor mitigates the problem. To evaluate read, write, and hold yields, we performed 10,000 Monto Carlo simulations in the 32-nm technology, and the results show our cell has 7.5×, 1.4×, and 1.1 × more yields than that of the conventional 6T SRAM cell. The proposed cell also has the least static power consumption. This amount is 1.5× less than the conventional 6T at the supply voltage of 0.5 V. [ABSTRACT FROM AUTHOR]