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In this paper, we derive a fast recurrence relation for a computer-generated-hologram (CGH). The recurrence relation based on Taylor expansion reduces the number of cosine computations as compared with conventional CGH formula. The recurrence relation calculates a CGH 7 or 8 times faster than the conventional CGH formula on a CPU and graphics processing unit (GPU). In addition, there is almost no difference between a CGH generated by the recurrence relation and that generated by the conventional type.

Particle Image Velocimetry (PIV) is a method of obtaining velocity field. A HORN-5 is a special-purpose computer had 4 FPGAs. We designed a circuit for PIV with an 8 × 8 two-dimensional 2-radix FFT in a FPGA on the HORN-5 and compared its calculation speed with that of a PC by using a C++ code. As a result, the calculation speed of the FPGA was found to be 8.93 times faster than that of the PC. Moreover, the system was adopted for reading artificial PIV standard images and real experimental images. On the numerical accuracy, the velocity vectors of both results were also found to be in good agreement with that of the PC by FORTRAN code.

We have designed a PC cluster system with special purpose computer boards for visualization of fluid flow using digital holographic particle tracking velocimetry (DHPTV). In this board, there is a Field Programmable Gate Array (FPGA) chip in which is installed a pipeline for calculating the intensity of an object from a hologram by fast Fourier transform (FFT). This cluster system can create 1024 reconstructed images from a 1024 × 1024 -grid hologram in 0.77 s. It is expected that this system will contribute to the analysis of fluid flow using DHPTV.

We have sped up the calculation of a computer-generated hologram by parallel computing using ClearSpeed Advance TM Dual CSX600 PCI-X Accelerator Board by ClearSpeed Technology plc. By using two boards in parallel, our system was able to perform the calculation 50 times as fast as a personal computer.

Using a system of combined PC and LSI is useful when a research environment does not allow using supercomputers and calculation objects are restricted. FPGA is different from ASIC. A circuit in FPGA can be designed and reconfigured with PC or workstation electrically. We designed and implemented a circuit for 8×8 two-dimensional 2-radix FFT in a FPGA and compared its calculation speed with that of a PC. As a result, the calculation speed of the FPGA was found to be 1.3 times faster than that of a PC.

A micro-digital holographic particle tracking velocimetry with high-speed system is constructed by a PC grid environment that employs Windows XP with AD-POWERs as parallel tool. Two algorithms for high-speed system are evaluated under the same PC grid environment. Both methods are based on a computer-generated hologram algorithm. One method is a division algorithm based on time development for the measurements, while the other is a division algorithm based on spatial reconstruction for the measurement. In case of the former, the performance is increased by a factor of 3.3 by using 4 PCs. The present system can compute huge hologram images and output them “on-site” at an experimental facility.

We developed a special-purpose computer for exploring similar biological sequences by Smith–Waterman method, Bioler-2 (BIOLogical sequence explorER). It can compute a complete similarity score between two biological sequences which have less than 10,000 characters. We integrated the system on two FPGA (Field Programmable Gate Array) chips, XC2V6000 (6M gates) by Xilinx corporation. They are mounted on the 32 bit PCI (Peripheral Component Interconnect) bus card which is connected to the host computer. The performance of Bioler-2 is 142 times faster than a general-purpose computer installed the Linux kernel version 2.4.25 compiled by gcc (Gnu Compiler Collection) version 3.3.3 with Pentium4 enabled hyper threading technology at 3.2 GHz. Bioler-2 is effective in the biological sequence analysis.

We built a special-purpose computer for exploring similar protein sequences by the dynamic programming method, BIOLER-1 (BIOLogical sequence explorER). It can compute a complete similarity between two protein sequences which have less than 1024 amino acids. We integrated the system on a PLD (Programmable Logic Device) chip, APEX EP20K300EQC240-1 (300,000 gates) by Altera corporation. It is mounted on the 32 bit PCI (Peripheral Component Interconnect) bus board which is connected to a personal computer. The performance is 3564 MIPS (Million Instructions Per Second) which is three times faster than a personal computer with Pentium4 at 1.8 GHz. BIOLER-1 showed us the effectiveness in the field of biological sequence analysis.

We designed and built a special-purpose computer for holography, HORN-4 (HOlographic ReconstructioN) using PLD (Programmable Logic Device) technology. HORN computers have a pipeline architecture. We use HORN-4 as an attached processor to enhance the performance of a general-purpose computer when it is used to generate holograms using a “recurrence formulas” algorithm developed by our previous paper. In the HORN-4 system, we designed the pipeline by adopting our “recurrence formulas” algorithm which can calculate the phase on a hologram. As the result, we could integrate the pipeline composed of 21 units into one PLD chip. The units in the pipeline consists of one BPU (Basic Phase Unit) unit and twenty CU (Cascade Unit) units. These CU units can compute twenty light intensities on a hologram plane at one time. By mounting two of the PLD chips on a PCI (Peripheral Component Interconnect) universal board, HORN-4 can calculate holograms at high speed of about 42 Gflops equivalent. The cost of HORN-4 board is about 1700 US dollar. We could obtain 800×600 grids hologram from a 3D-image composed of 415 points in about 0.45 sec with the HORN-4 system.

Computer-Generated Hologram (CGH) is well known to take an enormous computational time. We propose an efficient computational method for CGH suitable for hardware devices, which are fixed-point DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array) and ASIC (Application Specific Integrated Circuit). To be concrete, this method can compute a phase on a hologram by addition. When we operated this method on a personal computer, we could maximally compute CGH about 24 times faster than a traditional method. And also, when we adopted this method to FPGA chip, we could implement circuits about 5 times more than a traditional method.

We have designed and built a special-purpose computer for holography, HORN-3 (HOlographic ReconstructioN) using PLD (Programmable Logic Device) technology. We could integrate a pipeline to calculate hologram into one PLD chip, so that we can readily parallelize the system. By mounting two of the PLD chips on a PCI (Peripheral Component Interconnect) universal board, HORN-3 calculates light intensity at high speed of about 1.2 G flops. The cost of HORN-3 board is 200,000 Japanese yen (1600 US dollar). We obtained 1024× 768 grids hologram from a virtual 3D-image composed of 2500 points in about 60 sec with the HORN-3 system.

We recently developed a numerical scheme for solving advection equations based on a rational interpolation function. The scheme shows properties in suppressing spurious numerical oscillations near great gradients and sharing high accuracy in the smooth region. Results in one dimension were reported in a previous paper (F. Xiao, T. Yabe and T. Ito, Comput. Phys. Commun. 93 (1996) 1). In this paper, we, for completion, present the two- and three-dimensional versions of the scheme without directional splitting. Formula are derived in the way such as to recover the CIP method (T. Yabe, T. Aoki, Comput. Phys. Commun. 60 (1991) 219; T. Yabe, T. Ishikawa, P.Y. Wang, T. Aoki, Y. Kadota and F.Ikeda, Comput. Phys. Commun. 66 (1991) 233) by switching. The oscillation preventing quality of the scheme in two and three dimensions is tested by sample calculations.

A numerical scheme for solving advection equations is presented. The scheme is derived from a rational interpolation function. Some properties of the scheme with respect to convex-concave preserving and monotone preserving are discussed. We find that the scheme is attractive in suppressing overshoots and undershoots even in the vicinities of discontinuity. The scheme can also be easily switched as the CIP (Cubic interpolated Pseudo-Particle) method to get a third-order accuracy in smooth region. Numbers of numerical tests are carried out to show the non-oscillatory and less diffusive nature of the scheme.

We designed and built a special-purpose computer for holography, HORN-2 (HOlographic ReconstructioN). HORN-2 calculates light intensity at high speed of 0.3 Gflops per one board with single (32-bit floating point) precision. The cost of the board is 500 000 Japanese yen (5000 US dollar). We made three boards. Operating them in parallel, we get about 1 Gflops.

We have designed and built a special-purpose computer for the reconstruction of virtual images in three dimensions, HORN-1 (HOlographic ReconstructioN). HORN-1 calculates light intensity at high speed. The speed of HORN-1 achieves 300 Mflops-equivalent, and its electric parts cost is 60 000 Japanese yen (500 US dollar). It takes about 24 minutes to reconstruct a 100 × 100 × 8 virtual image from a 400 × 400 hologram.

We have designed and built GRAPE-1 (GRAvity PipE 1), a special-purpose computer for astrophysical N-body calculations. It is designed as a back-end processor that calculates the gravitational interaction between particles. All other calculations are performed on a host computer connected to GRAPE-1. For large-N calculations (N⪆104), GRAPE-1 achieves about 100 Mflops-equivalent in one board of size about 40 by 30 cm at the power of 2.5 watt. The pipelined architecture of the GRAPE-1 which is specialized and optimized for the N-body calculation is the key to the high performance. The design and construction of the GRAPE-1 system are discussed.