20 results on '"Andrea Biagioni"'
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2. Architectural improvements and technological enhancements for the APEnet+ interconnect system.
3. Large Scale Low Power Computing System - Status of Network Design in ExaNeSt and EuroExa Projects.
4. Gaussian and exponential lateral connectivity on distributed spiking neural network simulation.
5. The Brain on Low Power Architectures - Efficient Simulation of Cortical Slow Waves and Asynchronous States.
6. Real-time cortical simulations: energy and interconnect scaling on distributed systems.
7. Scaling to 1024 software processes and hardware cores of the distributed simulation of a spiking neural network including up to 20G synapses.
8. Impact of exponential long range and Gaussian short range lateral connectivity on the distributed simulation of neural networks including up to 30 billion synapses.
9. Power, Energy and Speed of Embedded and Server Multi-Cores applied to Distributed Simulation of Spiking Neural Networks: ARM in NVIDIA Tegra vs Intel Xeon quad-cores.
10. NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features.
11. EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes.
12. 'Mutual Watch-dog Networking': Distributed Awareness of Faults and Critical Events in Petascale/Exascale systems.
13. GPU peer-to-peer techniques applied to a cluster interconnect.
14. NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs.
15. Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems.
16. Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster.
17. A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report.
18. The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture
19. APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters
20. APEnet+: a 3D toroidal network enabling Petaflops scale Lattice QCD simulations on commodity clusters
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