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Self-Aligned-Source (SAS) technology is a process option commonly used in process integration for Flash NOR. This approach is realized by removing the field oxide from the source lines of the array, which is implanted with N-type dopant, so two adjacent word lines can be fully driven by the same source contact. Since field oxide removal is demanded to a RIE, a polymer layer on cell sidewall is expected after this step. The presence of this thin organic layer during the subsequent implantation step is supposed to act as a spacer, hence modulating the effective channel length (Leff). According to the continuous shrink of memory cell, this spacer becomes relevant compared with cell dimension and can not be neglected as second order effect. It is known that polymer deposition during etching step is not a perfectly controllable phenomenon. As a consequence, fluctuations in polymer thickness yield to fluctuations in cell characteristics. So, poor run-to-run, intra-wafer and even intra-sector repeatabilities often are the results. TEM analysis and electrical validations have been reported to demonstrate the relationships between deposited polymer presence and cell parameters spread. Figure 1 below is an example of TEM data.