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2. Rare-Earth Metal Scandate High-k Layers

3. Threshold Voltage Control in PMOSFETs with Polysilicon or Fully-Silicided Gates on Hf-Based Gate Dielectric Using Controlled Lateral Oxidation

18. Engineering the III-V Gate Stack Properties by Optimization of the ALD Process

20. (Invited) Vanadium Dioxide for Selector Applications

21. (Invited) Wetting Behavior of Aqueous Solutions on High Aspect Ratio Nanopillars with Hydrophilic Surface Finish

23. Study of InP Surfaces after Wet Chemical Treatments

27. (Invited) Vanadium Oxide as a Memory Material

31. High Depth Resolution Depth Profile Analysis of Ultra Thin High-κ Hf Based Films using MEIS Compared with XTEM, XRF, SE and XPS

32. Modeling of Alternative High-k Dielectrics for Memory Based Applications

37. Trapping in 1nm EOT high-k / MG

39. AVD and MOCVD TaCN-based Films for Gate Metal Applications on High k Gate Dielectrics

42. Atomic Layer Deposition of Hafnium Based Gate Dielectric Layers for CMOS Applications

43. Metal/High-K Interface Interactions Upon High Temperature Annealing - Are They Cause of Workfunction Changes

44. Evaluation of Nb(Si)N as Metal Gate Material

46. Wet Etch Characteristics of Hafnium Silicate Layers

47. Development of a Cu and W Compatible PERR Clean in BEOL Advanced Interconnect Patterning

48. (Invited) Selective Etch of Si and SiGe for Gate All-Around Device Architecture

49. N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

50. Evaluation of the Si0.8Ge0.2-on-Si Epitaxial Quality by Inline Surface Light Scattering: A Case Study on the Impact of Interfacial Oxygen

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