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• Protective relaying scheme for long transmission line. • Fault detection using positive sequence admittance of two-ends of the line. • Segregation of internal and external fault. • Localization of internal fault using positive sequence fault components. In this paper, a novel integrated approach of protective relaying methodology has been adopted for detecting faults and its location estimation in long transmission line. First, the detection algorithm has been formulated using positive sequence admittance. Subsequently, fault location algorithm has been developed using positive sequence voltage and current phasors. The proposed algorithms have been implemented on a 50 Hz, 400 kV single-circuit transmission line in MATLAB environment. A wide range of diversified and challenging cases have been simulated to test the reliability of this scheme. The results confirm the preciseness of the algorithm, as it can produce accurate results under stressed conditions, viz. high impedance fault (HIF), current transformer (CT) saturation/ capacitive voltage transformer (CVT) transient, close-in faults, swing condition, source strength variation, etc. Moreover, this scheme has also been successfully tested in series-compensated and double-circuit transmission line, which brings out the superiority of this scheme. The comparative analysis with recent protective relaying techniques institutes the potentiality and robustness of the scheme. [ABSTRACT FROM AUTHOR]

• Protective relaying scheme of UPFC compensated transmission line. • Fault detection using complex power of two end of the line. • Segregation of internal and external fault. • Localization of internal fault using sequence component of voltage and current signal. This study presents an integrated approach for discrimination of internal and external fault, and to obtain pin-point location of the fault in a transmission line connected to unified power flow controller (UPFC). To detect internal fault, this method uses positive sequence component of voltage and current at the local and remote end bus. Fault location estimation technique requires both positive and negative sequence voltage and current components measured from both ends of the line. The performance of the proposed technique has been evaluated by simulating a 400 kV double circuit UPFC compensated transmission line. This technique can detect internal fault under stressed conditions, viz. high impedance fault (HIF), change in source strength, change in load angle, and power swing. Precise fault location has been achieved under wide variation of system and fault parameters. The comparative assessment has been provided to prove the efficacy of the proposed approach. [ABSTRACT FROM AUTHOR]