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This paper proposes methodology and gate drive circuit that can immediately detect short‐circuit (SC) of multiparalleled SiC‐MOSFETs even under current imbalance condition. Proposed method detects SC current using an integration circuit that can sense di/dt. The detection level of SC current can be adjusted to a desired value regardless of the number of SiC‐MOSFETs connected in parallel. The effectiveness of the proposed approach was experimentally validated for four‐paralleled SiC‐MOSFETs under extreme current imbalance in SC condition. SC was detected within 0.5 μs and all SiC‐MOSFETs were protected without destruction at most 2.2 μs after the onset of SC, for all types of SC 1, 2, and 3. [ABSTRACT FROM AUTHOR]

This paper proposes a method to suppress the capacitor current imbalance between the phase legs of a three‐phase inverter circuit. This circuit consists of half‐bridge modules and DC‐link capacitors closely connected to each module. It can be designed for low stray inductance between power semiconductor devices and DC‐link capacitors in each module. However, in the conventional structure, the stray inductance between the phase legs may lead to an imbalance in the capacitor current due to the DC‐side resonance phenomenon under a higher switching frequency condition by using a SiC MOSFET. This paper presents the analyses of the equivalent circuit considering the circuit configuration, which suggests that capacitor current imbalance occurs depending on the stray inductance between phase legs. To suppress the capacitor current imbalance, a delta‐type bus bar connecting phase legs is proposed. The experiment results at 300 V and 4.6 A demonstrate the suppression effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]