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The article discusses several reasons why electronics manufacturers are favoring single in-line-package (SiP) over system-on-chip (SoC) in the United States. One major concern with using SoC is cost. A state-of-the-art SoC design for a consumer device can easily reach 10 million dollars once all of the required design engineering, verification, and tooling costs are taken into consideration. SiP are not only more cost-effective for integrating greater functionality in smaller form factors, but they also can be developed and made available in a one- to- two month cycle. Other key trends weighing in favor of SiP include die-thinning technologies and 3D stacking techniques, which enable a multichip package to have the same final form factor as a single-chip device. Individual chips in an SiP can now be tested, either in bare die form or in a micropackage form, prior to integration into an SiP module.