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Multilevel inverters are increasingly used in industrial applications in which service continuity is crucial. This paper presents an original approach to ensure the fault-tolerant operation of neutral-point-clamped (NPC) inverters in the case of an open-circuit fault event in a clamping diode, which is rarely investigated in the conducted research work. The proposed fault-tolerant strategy meets the following criteria: restoring rated output voltage and current during post-fault operation, realizing fault-tolerant operation without additional components, maintaining rated total harmonic distortion (THD) during fault-tolerant operation, and fast transition between faulty operation and remedial operation. In the proposed approach, prior to applying the appropriate remedial action, identification of the defective clamping diode is required. In this respect, a very fast and simple logic-based fault diagnosis is presented whose implementation does not need any additional components and external circuit. Moreover, it does not require any component modeling and complicated calculations. The proposed strategy is validated by simulation and experimentation. [ABSTRACT FROM AUTHOR]

In this paper, a five-level neutral-point-clamped (NPC) inverter with short-circuit fault-tolerant capability is presented. Based on the proposed approach, in order to ensure service continuity subsequent to a short-circuit fault event in a switch, two steps are carried out. First of all, destructive consequences arising from short-circuit fault in a power switch is prevented. Afterwards, according to the defected component, remedial actions are taken. The proposed strategy does not require any redundant component. The service continuity is acquired by applying a remedial control and modifying switching commands applied to the power switches. Using the proposed approach helps to restore the rated voltage and rated current at the terminal, and there is no limit for modulation index during fault-tolerant operation under remedial control. Furthermore, compared to healthy operation, harmonic content of the terminal voltage and current is not deteriorated during fault-tolerant operation. Moreover, additional components, such as bidirectional switches and contactors, are not employed in this strategy. Only some fast fuses are placed in the converter circuit for protection purposes which do not impose a noticeable cost compared to the bidirectional switches and contactors. [ABSTRACT FROM AUTHOR]

Discrete time dynamical chaotic systems obey a set of recurrence equations involving one or more variables. Many chaotic maps have been proposed. None that simultaneously provides two sine–cosine outputs has stationary mean and standard deviation, or is quite robust with respect to the data format used in the hardware implementation. Here, we propose a chaotic oscillator based on a complex phasor whose angular argument evolves according to a geometric progression that is independent of the instantaneous amplitude. In order to maintain the oscillations, the phasor magnitude is normalized at each iteration using an approximation factor. The statistical characteristics of this oscillator are stationary in the short term, and do not depend on the initial conditions. The mean and standard deviation of the two orthogonal sequences quickly approach 0 and 1 / 2 , respectively. The resulting distribution is similar to that of a digital sine with a constant angular step. We also present an FPGA architecture and its implementation results. This oscillator can be used in modulation schemes, such as the chaotic shift keying one or for data and image encryption. Finally, we show an original application that exploits the orthogonality of the two chaotic signals for the simultaneous encryption of two digital images. [ABSTRACT FROM AUTHOR]

In this paper, a so-called OPTimized Pulse Width Modulation (OPT-PWM) strategy with a minimal number of commutations for a multilevel converter (MC) is proposed. The principle is based on the reduction of the number of switch commutations by removing the unnecessary ones for each voltage level transition. The OPT-PWM strategy is applied to a five-level H-Bridge Neutral Point Clamped (HB-5L-NPC) inverter. A specific block based on a state machine is added to conventional modulation techniques to perform the transitions from a given voltage level to another one via the best trajectory with a minimal number of commutations. The principle of this additional block can be applied to any modulation technique. In this paper, the proposed strategy is validated first by simulation and then through experimental tests. [ABSTRACT FROM AUTHOR]

This paper proposes a new Unified Switch Fault Diagnosis (UFD) approach for two-stage non-isolated DC-DC converters used in energy harvesting applications. The proposed UFD is compared with a switch fault diagnosis consisting of two separate fault detection algorithms, working in parallel for each converter. The proposed UFD is simpler than the two parallel fault diagnosis methods in realization. Moreover, it can detect both types of switch failures, open circuit and short circuit switch faults. It can also be used for any two-stage non-isolated DC-DC converters based on two single switch converters, no matter the converter circuits in each stage. Some selected simulation and Hardware-in-the-Loop (HIL) experimentation results confirm the validity and efficiency of the proposed UFD. Also, the proposed UFD is applied successfully for fault-tolerant operation of a buck/buck–boost two-stage converter with synchronous control and a redundant switch. [ABSTRACT FROM AUTHOR]