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This paper presents a 3 in 1 standalone FPGA system which can perform color image blur detection in parallel with compression and encryption. Both blur detection and compression are based on the 3-level Haar wavelet transform, which is used as a common building block to save the resources. The compression is based on performing the hard thresholding scheme followed by the Run Length Encoding (RLE) technique. The encryption is based on the 128-bit Advanced Encryption Standard (AES), which is considered one of the most secure algorithms. Moreover, the modified Lorenz chaotic system is combined with the AES to perform the Cipher Block Chaining (CBC) mode. The proposed system is realized using HDL and implemented using Xilinx on XC5VLX50T FPGA. The system has utilized only 25% of the available slices. Furthermore, the system can achieve a throughput of 3.458 Gbps, which is suitable for real-time applications. To validate the compression performance, the system has been tested with all the standard $256\times 256$ images. It is shown that depending on the amount of details in the image, the system can achieve 30dB PSNR at compression ratios in the range of (0.08-0.38). The proposed system can be integrated with digital cameras to process the captured images on-the-fly prior to transmission or storage. Based on the application, the blurred images can be either marked for future enhancement or simply filtered out.

This paper presents UCloD, a novel random clock delay-based robust and scalable countermeasure against recently discovered remote power analysis (RPA) attacks. UCloD deploys very small clock delays (in the picosecond range) generated using the tapped delays lines (TDLs) to mitigate RPA attacks. UCloD provides the most robust countermeasures demonstrated thus far against RPA attacks. RPA attacks use delay sensors, such as Time to Digital Converters (TDC) or Ring Oscillators (ROs) to measure voltage fluctuations occurring in power delivery networks (PDNs) of Field Programmable Gate Arrays (FPGAs). These voltage fluctuations reveal secret information, such as secret keys of cryptographic circuits. The only countermeasure proposed thus far activates ROs to consume significant power and has managed to secure Advanced Encryption Standard (AES) circuits for up to 300,000 encryptions. Using TDLs available in FPGAs, UCloD randomly varies the clock to the cryptographic circuits under attack to induce noise in the adversary’s delay sensor(s). We demonstrate correlation power analysis (referred to as CPA) attack resistance of UCloD AES implementations for up to one million encryptions. Compared to an unprotected AES circuit, UCloD implementations have minimal overheads (0.2% Slice LUT overhead and 4.8% Slice register overhead for Xilinx implementations and 0.5% LogicCells overhead for Lattice Semiconductor implementations).

Power analysis attacks pose a significant threat to the security of cryptographic devices as they can reveal a secret key. Performing cryptographic operations based on a randomly varying clock (RVC) is a practical countermeasure against such attacks. The countermeasure makes it difficult to align power traces, which is a prerequisite for power analysis attacks to succeed. This paper introduces a synchronous real-time sampling (SRTS) technique as an advanced hardware-implemented approach to collect traces for a power analysis attack that negates countermeasures involving practical RVCs. By recovering the RVC, the leakage signal corresponding to the recovered clock edge is synchronously sampled in real time. We propose an analog-based hardware system implemented with two circuit blocks for SRTS operations, namely, a clock recovery block and an analog signal-processing block. The target of the power analysis attack is an Advanced Encryption Standard (AES)-128 software-implemented smart card operated at 20 MHz, which is varied in the range of 30% by the RVC countermeasure. The traces captured by the SRTS show that the suboperations of the AES encryption are distinct in contrast to the indistinguishable waveforms captured at a fixed sample rate. The results of the power analysis attack demonstrate that the correct key is successfully extracted with a high correlation coefficient at the S-box output of the AES. The proposed SRTS method improves the relative distinguishing margin by 191.4% and reduces the required number of traces to 2.75% compared with the conventional correlation power analysis attack with a fixed sample clock.

Fog computing complements cloud computing by removing several limitations, such as delays and network bandwidth. It emerged to support Internet of Things (IoT) applications wherein its computations and tasks are carried out at the network’s edge. Heterogeneous IoT devices interact with different users throughout a network. However, data security is a crucial concern for IoT, fog and cloud network ecosystems. Since the number of anonymous users increases and new identity disclosures occur within the IoTs, it is becoming challenging to grow mesh networks to deliver end to end communications, as the extended IoT networks resemble a mesh architecture. To reinforce data security over IoTs, we deploy a microservice-based blockchain mechanism for fogs, which works as a decentralized client-server network medium (i.e., secured end device-based communication). We implement a blockchain equipped security scheme to be used with a fog-IoT hierarchical tree-based overlay mesh architecture to address and develop the network performance issues. In this study, we consider encryption and decryption delays from IoT and fog-integrated parts to monitor data records and compare them through the developed security scheme. The blocks of a blockchain offer the desired execution results mainly in terms of the algorithmic efficiency, which correlates with the existing algorithms, namely the Advanced Encryption Standard (AES), the Rivest Shamir Adleman (RSA), and the Data Encryption Standard (DES). Our ‘BFIM’ scheme has an enhanced task scheduling capacity and a more efficient throughput than the AES, DES, RSA resource deliverables (i.e., tasks). Our comprehensive performance evaluation implies that the Blockchain-based Fog IoT Microservice (i.e., BFIM) architecture provides a task delivery efficiency of 78.79% (i.e., task deliverable) and a service delivery efficiency of 83.24% (i.e., task scheduling). The ‘BFIM’ also has an overall process delivery efficiency of 75% (i.e., time delay, throughput) in the fog layer, rather than a central cloud layer running the AES, DES, and RSA algorithms.

Graphics processing units (GPUs) are specially designed for parallel applications and perform parallel operations much faster than central processing units (CPUs). In this work, we focus on the performance of the Advanced Encryption Standard (AES) on GPUs. We present optimizations which remove bank conflicts in shared memory accesses and provide 878.6 Gbps throughput for AES-128 encryption on an RTX 2070 Super, which is equivalent to 4.1 Gbps per Watt. Our optimizations provide more than 2.56x speed-up against the best GPU results in the literature. Our optimized AES implementations on GPUs even outperform any CPU using the hardware level AES New Instructions (AES-NI) and legacy FPGA-based cluster architectures like COPACOBANA and RIVYERA. Even on a low-end GPU like MX 250, we obtained 60.0 Gbps throughput for AES-256 which is generally faster than the read/write speeds of solid disks. Thus, transition from AES-128 to AES-256 when using GPUs would provide military grade security with no visible performance loss. With these breakthrough performances, GPUs can be used as a cryptographic co-processor for file or full disk encryption to remove performance loss coming from CPU encryption. With a single GPU as a co-processor, busy SSL servers can be free from the burden of encryption and use their whole CPU power for other operations. Moreover, these optimizations can help GPUs to practically verify theoretically obtained cryptanalysis results or their reduced versions in reasonable time.

To secure various forms of data, a polymorphic variant of the Advanced Encryption Standard (P-AES) has been introduced. In the P-AES, the AES parameters’ values will change with every new key. The exact values will be available only to legitimate communicating parties during execution time. To achieve these objectives, the basic AES transformations, SubBytes, ShiftRows, and MixColumns, have been made key-dependent in the proposed P-AES. Hence, with every new key, these transformations will operate differently. The receiver can retrieve the operations’ details from the encryption key. Consequently, polymorphism has been achieved and interoperability remains intact. P-AES has been implemented seamlessly using the existing AES modules, and the performance was more or less equal to the AES performance (71 and 70 milliseconds to encrypt 500 bytes using the P-AES and the AES respectively). From a security standpoint, the proposed P-AES fully complies with Kerckhoff’s principle. This means the cipher has an open design, and the security provided by the P-AES depends only on the secrecy of the encryption key. The cipher resistance to differential and linear attacks has been proved. Moreover, the resulting proposed cipher can operate in 128 different ways, which will significantly reduce the capabilities of any sophisticated attacker. Furthermore, the proposed P-AES’s scores of the key avalanche and the plaintext avalanche were 0.496 and 0.504 respectively. Finally, the Statistical Test Suite (STS) recommended by the NIST has been used to ensure the randomness of the cipher output, and the cipher has passed all the STS tests.

Since Rijndael algorithm was selected as the Advanced Encryption Standard (AES) by NIST, optimization research for the AES has been actively conducted on various IoT-based processors. In an 8-bit AVR environment, LIGHT version of Fast AES CTR-mode Encryption (FACE-LIGHT) was proposed at ICISC’2019 conference. However, in a Wireless Sensor Network environment, where sessions are frequently changed, FACE-LIGHT seems not efficient in terms of available memory and generating a pre-computation table. In this article, we present a new column-wise fashion implementation. Unlike previous best AES implementations, our proposed implementation in an 8-bit AVR microcontroller combines SubBytes, ShiftRows, and MixColums operations and optimizes the operation speed through efficient register scheduling. Our constant-time implementation uses a significantly less table than FACE-LIGHT in an 8-bit AVR microcontroller, achieving 2,251, 2,706, and 3,160 clock cycles when encrypting 128-bit data for each of three security levels. In particular, our 256-bit security level AES implementation is the fastest AES implementation as far as we know in 8-bit AVR microcontroller. Finally, we apply our implementation in CounTeR-mode_Deterministic Random Bit Generator (CTR_DRBG), one of the upper algorithms of a symmetric-key algorithm, to prove the generality of our optimization technology in various operating modes of AES.

The success of AES encryption standard created challenges for the cryptographers to construct strong substitution-boxes using different underlying approaches. It is because they are solely responsible to decide the robustness of cryptosystem against linear and differential cryptanalyses. With an aim to fulfill the mentioned requirement of robustness, a novel group theoretic and graphical method is proposed to construct S-box with optimal features. Firstly, a strong S-box is generated with the help of orbits of coset graphs and the action of proposed powerful permutation of symmetric group S256. In addition, a specific group is designed the action of whose pairs of permutations has the ability to generate as many as 462422016 strong S-boxes. Few of such proposed S-boxes are reported and assessed against standard performance parameters to validate the effectiveness of proposed findings. The features of proposed S-boxes are compared with most of the recent S-boxes to validate the superior performance. Moreover, they are also applied for image encryption to demonstrate their suitability for multimedia security applications.

Gigantic data transfer over networks and internet turned in developing a large number of encryption techniques. As a consequence, in parallel, it gave birth to new plans of attacks. In facet of data security, the algorithms specifically Rijndael (Advanced Encryption Standard-AES), SERPENT and TWOFISH are equally considered to be the best. However, they pay less attention in some cryptographic areas like digital image encryption schemes because of their time consumption inferiority. In this paper, we introduce a time diminishing improved version of SERPENT algorithm depending upon chain ring-based substitution boxes (S-boxes) dealing with 8-bit vector instead of 4-bit. The multiplicative substructures in a chain ring have multiple generators and thus the chain ring based S-boxes improve the algebraic complexity of the cipher. Apart from it, the algorithm is utilized in a digital RGB image encryption application where throughout the chain ring operations are performed. The digital image analyses reveal that the proposed scheme consumes less time (i.e. 8.2 microseconds for encryption and 5.8 microseconds for decryption of a 128-bit block) as compared to the existing prominent RGB image encryption techniques. Furthermore, the investigation on the suggested RGB image encryption scheme it is observed that it has a great resistance against the statistical and the differential attacks.

Organizations share an evolving interest in adopting a cloud computing approach for Internet of Things (IoT) applications. Integrating IoT devices and cloud computing technology is considered as an effective approach to storing and managing the enormous amount of data generated by various devices. However, big data security of these organizations presents a challenge in the IoT-cloud architecture. To overcome security issues, we propose a cloud-enabled IoT environment supported by multifactor authentication and lightweight cryptography encryption schemes to protect big data system. The proposed hybrid cloud environment is aimed at protecting organizations' data in a highly secure manner. The hybrid cloud environment is a combination of private and public cloud. Our IoT devices are divided into sensitive and nonsensitive devices. Sensitive devices generate sensitive data, such as healthcare data; whereas nonsensitive devices generate nonsensitive data, such as home appliance data. IoT devices send their data to the cloud via a gateway device. Herein, sensitive data are split into two parts: one part of the data is encrypted using RC6, and the other part is encrypted using the Fiestel encryption scheme. Nonsensitive data are encrypted using the Advanced Encryption Standard (AES) encryption scheme. Sensitive and nonsensitive data are respectively stored in private and public cloud to ensure high security. The use of multifactor authentication to access the data stored in the cloud is also proposed. During login, data users send their registered credentials to the Trusted Authority (TA). The TA provides three levels of authentication to access the stored data: first-level authentication - read file, second-level authentication - download file, and third-level authentication - download file from the hybrid cloud. We implement the proposed cloud-IoT architecture in the NS3 network simulator. We evaluated the performance of the proposed architecture using metrics such as computational time, security strength, encryption time, and decryption time.

The Internet of Things (IoT) industry is growing very fast to transform factories, homes, farms and practically everything else to make them efficient and intelligent. IoT is applied in different resilient scenarios and applications. IoT faces lots of challenges due to lack of computational power, battery and storage resources. Fortunately, the rise of blockchain technology facilitates IoT in many security solutions. Using blockchain, communication between IoT and emerging computing technologies is made efficient. In this work, we propose a secure service provisioning scheme with a fair payment system for Lightweight Clients (LCs) based on blockchain. Furthermore, an incentive mechanism based on reputation is proposed. We use consortium blockchain with the Proof of Authority (PoA) consensus mechanism. Furthermore, we use Smart Contracts (SCs) to validate the services provided by the Service Providers (SPs) to the LCs, transfer cryptocurrency to the SPs and maintain the reputation of the SPs. Moreover, the Keccak256 hashing algorithm is used for converting the data of arbitrary size to the hash of fixed size. AES128 encryption technique is used to encrypt service codes before sending to the LCs. The simulation results show that the LCs receive validated services from the SPs at an affordable cost. The results also depict that the participation rate of SPs is increased because of the incentive mechanism.

The most serious challenges currently faced by healthcare environment is the decision making related to the installation of the most suitable and appropriate lightweight authentication cipher that could provide solutions towards the authentication issues prevailing in IoHT devices. This decision making becomes more troublesome and tricky due to the number of factors that are taken into account such as availability of many existing ciphers, complex and multiple numbers of requirements involved and frequent changing of these requirements from one platform to another. This decision making is also hampered by the nature of IoT devices operating in healthcare environment as they come up with limited functionality, processing, bandwidth and memory. In this regard, we present an evaluation framework focuses upon the selection of best light weight cryptographic ciphers by considering the most important parameters or requirements of criteria. The proposed framework considers the requirements like performance, physical and security as suggested by widely accepted standards such as National Institute of Standards and Technology (NIST) and International Standard Organization standard such as ISO/IEC 29192 for building evaluation criteria. This framework evaluates and selects the best lightweight cryptographic among the 10 ciphers i.e. PRESENT-80, Scalable Encryption Algorithm (SEA), HIGHT, Lightweight Encryption Algorithm (LEA) Advanced Encryption Standard (AES-128), mCrypton, NOEKEON, Klein, Camellia and Tiny Encryption Algorithm (TEA) for the purpose of evaluation in IoHT environment. This framework uses two decision making methods such as Criteria Importance Through Inter criteria (CRITIC) and Technique for Order of Preference by Similarity to Ideal Solution (TOPSIS). CRITIC assigns weights to alternatives and TOPSIS is used for evaluating alternatives (ciphers) against the defined criteria of evaluation. The proposed work is novel due to number of reasons such as the newly defined criteria adopted in this framework is the first attempt to use the security requirements of International Standard Organization (ISO) and National Institute of Standards and Technology (NIST). Secondly, this is first time that CRITIC and TOPSIS methods have been applied for assessment and decision making in healthcare environment. Similarly, the selected lightweight authentication cryptographic ciphers are used for the first time for assessment in IoHT environment. This approach addresses both hardware and software characteristics for selecting the best security option for lightweight cryptographic security.

Dynamic and non-linear systems have been used to generate random bits in high-security applications for decades. In this perspective, due to their stochastic characteristic, chaotic systems have been emerging as the natural choice for the generation of random bits. This paper presents the design and the implementation of a chaos-based true random number generator and a chaos-key based data encryption scheme for secure communications. The mathematical expression of the dynamic system is presented and analyzed to evaluate the possibility of chaos occurrence. Then, the chaotic system is realized at the circuit level using 130 nm CMOS technology to generate random bit sequences, which are utilized in data encryption. Chaotic signal outputs of the chaos-based random number generator circuit are sampled at a maximum frequency of 50 MHz, enabling a high throughput of random bits. The core of the chaotic circuit consumes $630~\mu \text{W}$ in static mode and a maximum of $660~\mu \text{W}$ in running mode. The chaos-based one-time pad encryption scheme using the chaos-key generator shows the advantages of using this random number generator in secure communications. In this context, the data secrecy is compared to the advanced encryption standard AES128. Moreover, the design is simulated in different working conditions such as voltage supply and temperature variations, where it is shown that the random bit output benefits from a high entropy per bit and passes the standard statistical test suite (NIST) for cryptographic applications.

With predictions suggesting there will be 18 billion Internet of Things (IoT) devices live by 2022, performance of these low powered devices, as well as security is of utmost importance. Managing security and performance is a balancing act. Achieving this balance will always continue to be a challenge. This research presents two main contributions to this area. The first contribution is a framework to measure cryptographic performance of IoT devices. The areas of measurement are power consumption, time cost, energy cost, random access memory (RAM) usage and flash usage. The second contribution is an insightful comparison of the performance of the ATmega328, STM32F103C8T6 and ESP8266 low powered microcontroller devices. Experiments were conducted on these devices running various cryptographic operations. The measured operations are from three encryption algorithms: Advanced Encryption Standard (AES), ChaCha and Acorn. The proposed methods from this research are real-world in nature rather than simulated, and can be used by others wishing to conduct their own IoT performance testing. The results show that the ATmega328 has the lowest overall power consumption. The ESP8266 was generally the fastest performing device. ChaCha outperformed AES in both time cost and energy cost. Both algorithms outperformed Acorn in these metrics. The STM32F103C8T6 device displayed the best overall energy cost, while still performing well in terms of time. The results from the experiments conducted in this study can be used by network designers, developers and others to make appropriate decisions in IoT deployments with regards to balancing performance and security.

Cryptography entails the practice of designing mathematical algorithms to secure data communication over insecure networks in the presence of adversaries. In this aspect, a cryptographic algorithm encrypts the confidential data and converts it into a non-readable text for adversaries. Advanced Encryption Standard (AES) is the most effective encryption algorithm proposed till now. Substitution-box (S-box) is the most crucial and only nonlinear component in AES (or any cryptographic algorithm), which provides data confusion. A highly nonlinear S-box offers high confidentiality and security against cryptanalysis attacks; hence, the design of S-box is very crucial in any encryption algorithm. To address this challenge, we propose a novel algebraic technique for S-box construction to generate highly nonlinear $8\times 8$ S-boxes based on the action of matrices (conforming to the basis of $\mathrm {P}_{7}\left [{ \mathrm {Z}_{2} }\right]$ ) on the Galois field $\mathrm {GF}\left ({2^{8} }\right)$ . Consequently, by our proposed algorithm, we obtain $\mathrm {1.324\times }{10}^{14}$ different S-boxes. Standard S-box tests analyze the cryptographic strength of our proposed S-boxes. The examined results show that the proposed S-boxes possess state-of-the-art cryptographic properties. Moreover, we also demonstrate the effectiveness of the proposed S-boxes in image encryption applications using the majority logic criterion.

Edge computing has become a promising paradigm for the context-aware and delay-sensitive IoT data analytics. For the sake of security, some cryptographic algorithms such as AES, RSA, and so on, are employed for the encryption communication and authentication. The collision power attack is a typical physical attack to recover the secret key of the AES algorithm. However, almost all collision attacks aim at the detection of internal collisions caused by the output of S-boxes, and the linear layers are not concerned with those protected implementations. The relation between the mask and the masked data has been given little attention and stays as is, where the leakages still exist. In this paper, we focus on three typical AES implementations in edge computing, and propose a new type of collision attack by making use of leakages from linear layers, which is capable of breaking masking schemes with uniformly distributed random masks. In addition, a novel scalable collision attack of general applicability and high-efficiency is proposed and applied to masked linear layers and masked S-boxes. It can reach an equal level of performance compared to the second-order power analysis with acceptable off-line search, which improves the known collision attacks significantly.

In this paper, a method for image encryption is proposed based on a novel approach using chaos and transcendental numbers for generating the substitution box and the ciphering keys. The Chaotic Pi Ciphering (CPC) is a robust symmetric cryptosystem of the substitution-permutation-network type, that ciphers images in ten rounds. The objective of CPC is to avoid some general weakness points in cryptosystems, such as the vulnerability to certain types of attacks or the encryption with data loss. The number of rounds can be increased up to 14, with an even further increment of the ciphering security. An 8×8 substitution box is constructed using chaos, and its value of the Differential Power Analysis is lower than the corresponding to the Advanced Encryption Standard (AES). It makes CPC more resistant to differential and linear attacks than AES. CPC has approximately 2512 keys, presenting a high resistance to brute-force attacks. Chaos is produced by a nonlinear differential equation, and the Walsh function is applied to measure the nonlinearity of the box. The transcendental number pi and a positive integer are employed to generate the schedule keys, and the key length is equal to the image size. The randomness of the encrypted images is evaluated with four tests: entropy, correlation, Discrete Fourier Transform, and a goodness-of-fit test using the chi square distribution χ2. CPC was tested using well-known images from the related literature, and its performance was compared to the corresponding to AES. The results show a good entropy and a high randomness, indicating a high-quality ciphering.

In recent years, the Internet of Things (IoT) has significantly increased the number of Internet connections to a large number of objects in different domains, including industry, homes and transportation. The LoRaWAN developed by the LoRa Alliance is a long-range wide area network specification suitable for an IoT environment due to its low-power communication. It provides a star-of-stars topology, well-defined MAC layer protocol and three communication modes to further lower its power consumption and employs the Advanced Encryption Standard (AES) cryptography and several session keys to increase its network security. However, for battery powered IoT end nodes, the AES encryption process consumes some amounts of power owing to involving multiple cycles of repetition. To solve this problem, in this study, we propose a low power consumed AES encryption architecture, named Low-Power AES Data Encryption Architecture (LPADA), which reduces the power consumed by the AES for data encryption by using low power SBox, power gating technique and power management method. A key updating procedure is also proposed to increase the security of the session-key renewal. The system is simulated using the Synopsys library with five different supply voltages. The experimental results show that 62.0% of dynamic power reduction and 88.5% of leakage power lowering have been achieved compared to the power consumed by traditional AES data encryption. The security analysis also shows that the key updating procedure for the LPADA enables mutual authentication between end nodes and application servers, and resists replay attacks and eavesdropping attacks from hackers.

In this paper, a novel framework for analyzing Physical Layer Security (PLS) of Directional Modulation (DM) techniques has been introduced. The proposed framework maps the concepts of PLS techniques to cryptographic techniques, enabling the analysis of DM techniques as block encryption ciphers. The relevance of the proposed framework has been shown by applying it on Antenna Subset Modulation (ASM). After appropriate physical layer mappings, the encryption strength of ASM is analyzed using National Institute of Standards and Technology’s Statistical Test Suite (NIST’s STS). The performance of ASM is benchmarked against strong block encryption cipher of Advanced Encryption Standard (AES) using data types of image, text, and audio. A new metric, namely Physical Layer Randomness (PLR), has been introduced for direct comparison of encryption strength of PLS techniques to that of cryptographic techniques. The analysis shows that Optimized Antenna Subset Selection (OASS) that reduced average Side-Lobe Levels (SLLs) and improved Symbol Error Rate (SER), has rather adverse effects on encryption strength of ASM. Furthermore, it has been found that scrambling the selection of antenna subsets imparts negligible improvement in PLR.

Pseudorandom number generators (PRNGs) are important in cryptography and have been used in several security applications, such as authentication protocols, session keys, key distribution, and keystream for a one-time pad. Producing PRNGs is a critical issue because they should be uniform in distribution, unpredictable, and independent. Several PRNGs are available, but the problem lies in determining the one with the best performance. The performance of PRNGs is determined by passing a set of statistical tests' set by the National Institute of Standards and Technology (NIST). The NIST also recommends random number generation using advanced encryption standard and triple data encryption standard algorithms with the counter mode of operation. Furthermore, several block cipher algorithms (BCAs) and alternates that are present may produce strong PRNG than NIST recommendations. Therefore, in this paper, different BCAs are explored and implemented, and their results are analyzed and addressed. This paper may help in producing a strong key generation, which is deemed necessary for cryptographic authentication and other security applications.

We propose a low-latency approach for generating secure electrocardiogram (ECG) feature-based cryptographic keys. This is done by taking advantage of the uniqueness and randomness properties of ECG’s main features. This approach achieves a low-latency since the key generation relies on four reference-free ECG’s main features that can be acquired in short time. We call the approach several ECG features (SEF)-based cryptographic key generation. SEF consists of: 1) detecting the arrival time of ECG’s fiducial points using Daubechies wavelet transform to compute ECG’s main features accordingly; 2) using a dynamic technique to specify the optimum number of bits that can be extracted from each main ECG feature, comprising of PR, RR, PP, QT, and ST intervals; 3) generating cryptographic keys by exploiting the above-mentioned ECG features; and 4) consolidating and strengthening the SEF approach with cryptographically secure pseudo-random number generators. Fibonacci linear feedback shift register and advanced encryption standard algorithms are implemented as the pseudo-random number generator to enhance the security level of the generated cryptographic keys. Our approach is applied to 239 subjects’ ECG signals comprising of normal sinus rhythm, arrhythmia, atrial fibrillation, and myocardial infraction. The security analyses of the proposed approach are carried out in terms of distinctiveness, test of randomness, temporal variance, and using National Institute of Standards and Technology benchmark. The analyses reveal that the normal ECG rhythms have slightly better randomness compared with the abnormal ones. The analyses also show that the strengthened SEF key generation approach provides a higher security level in comparison to existing approaches that rely only on singleton ECG features. For the normal ECG rhythms, the SEF approach has in average the entropy of about 0.98 while cryptographic keys which are generated utilizing the strengthened SEF approach offer the entropy of ~1. The execution time required to generate the cryptographic keys on different processors is also examined. The results reveal that our SEF approach is in average 1.8 times faster than existing key generation approaches which only utilize the inter pulse interval feature of ECG.

Currently, Internet of Things (IoT) as an essential infrastructure proposed for industries and different applications has been popularly applied to different domains, such as healthcare and smart farming, for helping people to do something, aiming to improve our living environments. LoRaWAN, as a Long-Range Wide Area Network specification recommended by the LoRa Alliance, is a low power and long distance communication protocol suitable for IoT environments. This protocol adopts a widely used data encryption method, i.e., Advanced Encryption Standard (AES), developed based on powerful algebra operations and multiple encryption cycles to ensure its communication security. LoRaWAN reduces communication power by setting different transmission latencies for different end-devices; however, AES does not take into account its end device's encryption power. In this paper, a high secure but low-power consumption communication scheme for the LoRaWAN, named the Secure Low Power Communication (SeLPC) method, is proposed to further reduce end-devices' data encryption power by reducing encryption cycles of AES. In the SeLPC, encryption key and D-Box update procedure is presented to enhance security level and simplify the AES encryption process so that the power consumption can be further lowered. Comparing with the traditional AES, the analysis results show that the SeLPC can minimize the encryption power up to 26.2%. The SeLPC can also resist three attacks, including known-key, replay, and eavesdropping attacks and is practically helpful for use in LoRaWAN IoT environments.

Owing to the exceptional growth of information exchange over open communication channels within the public Internet, confidential transmission of information has become a vital current concern for organizations and individuals. In the proposed content-protection scheme, the decryption key is embedded in the encrypted image by utilizing machine learning, nearest-centroid clustering classifier, followed by Least Significant Bit matching (LSB-M) in the spatial domain. An image is first encrypted with the Advanced Encryption Standard (AES) algorithm in output feedback (OFB) mode, after which the AES key is embedded into the encrypted image. Preliminary nearest-centroid clustering followed by shuffling the sequence of pixels within the clusters before applying LSB-M makes any attack more complex, as the bits of the key are further dispersed within the encrypted image. In terms of contributions, one contribution is the direct implementation of the proposed security mechanism on color images rather than first converting them into gray tones. Another contribution of the Crypto-Stego method is that, it requires no separate key distribution mechanism to decrypt the information. In addition, a parallel-processing approach is implemented to improve the execution time and the efficiency of the scheme by exploiting system resources. Extensive experiments were performed on RGB images with different resolutions and sizes to confirm the effectiveness of the scheme. The high Structural Similarity (SSIM) index score confirmed that the overall carrier image and stego-image were unaltered by processing. While an average value over the test images of 0.0594 for Mean Squared Error (MSE) confirmed that malicious individuals cannot detect the presence of stego data in the cover image. Moreover, negligible pixel intensity histogram changes also validated the effectiveness of the proposed scheme. An average 77% efficiency and 1.5 times speed-up factor was achieved through parallel processing showed the effectiveness of the joint Crypto-Stego method for image confidentiality. yes

Unlike prior efforts in cybersecurity research, a dynamic defense theory, called moving target defense, increases the complexity and costs for attacks by effectively restricting the vulnerability exposure and the attack opportunities through various continually-changing evaluation, development mechanisms and strategy. Data encryption standard (DES) was the classical scheme of the traditional symmetric-key encryption schemes. Now it has been gradually replaced by the triple DES or advanced encryption standard (AES) so that the encoder has a larger key space. However, both the triple DES and AES cannot meet the dynamic security requirements of dynamic defense due to their static extension to the key space. In this paper, we propose a dynamic three-layer encryption scheme based on DES and network coding, with a low-complexity partial key update mechanism. Based on the theoretical analysis, the new scheme is shown to have the benefit to achieve a dynamic transition between efficiency and security, which increases its adaptability to various cyber conditions. The simulation results also show that the running ratio of the new scheme is relatively lower than or comparable to the triple DES.

Hadoop framework has been evolved to manage big data in cloud. Hadoop distributed file system and MapReduce, the vital components of this framework, provide scalable and fault-tolerant big data storage and processing services at a lower cost. However, Hadoop does not provide any robust authentication mechanism for principals’ authentication. In fact, the existing state-of-the-art authentication protocols are vulnerable to various security threats, such as man-in-the-middle, replay, password guessing, stolen-verifier, privileged-insider, identity compromization, impersonation, denial-of-service, online/off-line dictionary, chosen plaintext, workstation compromization, and server-side compromisation attacks. Beside these threats, the state-of-the-art mechanisms lack to address the server-side data integrity and confidentiality issues. In addition to this, most of the existing authentication protocols follow a single-server-based user authentication strategy, which, in fact, originates single point of failure and single point of vulnerability issues. To address these limitations, in this paper, we propose a fault-tolerant authentication protocol suitable for the Hadoop framework, which is called the efficient authentication protocol for Hadoop (HEAP). HEAP alleviates the major issues of the existing state-of-the-art authentication mechanisms, namely operating-system-based authentication, password-based approach, and delegated token-based schemes, respectively, which are presently deployed in Hadoop. HEAP follows two-server-based authentication mechanism. HEAP authenticates the principal based on digital signature generation and verification strategy utilizing both advanced encryption standard and elliptic curve cryptography. The security analysis using both the formal security using the broadly accepted real-or-random (ROR) model and the informal (non-mathematical) security shows that HEAP protects several well-known attacks. In addition, the formal security verification using the widely used automated validation of Internet security protocols and applications ensures that HEAP is resilient against replay and man-in-the-middle attacks. Finally, the performance study contemplates that the overheads incurred in HEAP is reasonable and is also comparable to that of other existing state-of-the-art authentication protocols. High security along with comparable overheads makes HEAP to be robust and practical for a secure access to the big data storage and processing services.

Due to the significant advancement of the Internet of Things (IoT) in the healthcare sector, the security, and the integrity of the medical data became big challenges for healthcare services applications. This paper proposes a hybrid security model for securing the diagnostic text data in medical images. The proposed model is developed through integrating either 2-D discrete wavelet transform 1 level (2D-DWT-1L) or 2-D discrete wavelet transform 2 level (2D-DWT-2L) steganography technique with a proposed hybrid encryption scheme. The proposed hybrid encryption schema is built using a combination of Advanced Encryption Standard, and Rivest, Shamir, and Adleman algorithms. The proposed model starts by encrypting the secret data; then it hides the result in a cover image using 2D-DWT-1L or 2D-DWT-2L. Both color and gray-scale images are used as cover images to conceal different text sizes. The performance of the proposed system was evaluated based on six statistical parameters; the peak signal-to-noise ratio (PSNR), mean square error (MSE), bit error rate (BER), structural similarity (SSIM), structural content (SC), and correlation. The PSNR values were relatively varied from 50.59 to 57.44 in case of color images and from 50.52 to 56.09 with the gray scale images. The MSE values varied from 0.12 to 0.57 for the color images and from 0.14 to 0.57 for the gray scale images. The BER values were zero for both images, while SSIM, SC, and correlation values were ones for both images. Compared with the state-of-the-art methods, the proposed model proved its ability to hide the confidential patient's data into a transmitted cover image with high imperceptibility, capacity, and minimal deterioration in the received stego-image.

A high capacity data hiding method using lossless compression, advanced encryption standard (AES), modified pixel value differencing (MPVD), and least significant bit (LSB) substitution is presented. Arithmetic coding was applied on a secret message for the lossless compression, which provided ~22% higher embedding capacity. The compressed secret message is subjected to AES encryption; this provides higher security in the cases of steganalysis attacks. After compression and encryption, the LSB substitution and MPVD are applied. In MPVD, the adaptive non-overlapping $3\times 3$ pixel blocks or a combination of $3\times 3$ and $2\times 2$ blocks are used in raster fashion. It is experimentally established that with the proposed method, significant enhancement in embedding capacity was achieved and 214 132 extra bits than existing methods could be embedded due to the use of arithmetic compression and MPVD. The MPVD and arithmetic coding together resulted into 25% enhanced embedding capacity than the earlier methods. The proposed method also provides high levels of visual quality with an average of 36.38 dB at 4.00 bpp. The proposed method is also proved to be secure against regular/singular (RS) steganalysis.