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2. Analysis of Degradation Mechanism in Poly-Si TFTs Under Dynamic Gate Voltage Stress With Short Pulse Width Duration

Author

Zhang, Meng, Jiang, Zhendong, Lu, Lei, Wong, Man, and Kwok, Hoi-Sing

Abstract

Degradation behaviors of polycrystalline silicon thin-film transistors under dynamic gate voltage stress with short pulse width duration are systematically investigated for the first time. Both the peak voltage duration and the base voltage duration have an impact on the hot carrier degradation of the device. Incorporated with simulations, an advanced model for nonequilibrium junction degradation is proposed.

Published
2024
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9. High-Performance Self-Aligned Top-Gate Amorphous InGaZnO TFTs With 4 nm-Thick Atomic-Layer-Deposited AlO x Insulator.

Author

Li, Jiye, Zhang, Yuqing, Wang, Jialiang, Yang, Huan, Zhou, Xiaoliang, Chan, Mansun, Wang, Xinwei, Lu, Lei, and Zhang, Shengdong

Subjects
THIN film transistors, AMORPHOUS semiconductors, DIELECTRIC materials, TRANSISTORS
Abstract

Electrical characteristics of self-aligned top-gate (SATG) amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) with 4 nm-thick atomic-layer-deposited (ALD) AlOx gate insulator (GI) are investigated. It is demonstrated that the SATG a-IGZO TFTs present high-performance metrics including a near-ideal subthreshold swing (SS) of 60.9 mV/dec, a low off-state current below 10−12 A, a positive ${V}_{\text{th}}$ of 0.1 V, and a decent mobility of 14.1 cm2/ $\text{V}\,\cdot $ s. In addition, the TFTs exhibit negligible ${V}_{\text{th}}$ shifts less than 0.02 V against electrical bias stresses. Both high performance and excellent stability are thus simultaneously achieved for the ultrathin GI of amorphous oxide semiconductor (AOS) TFTs. [ABSTRACT FROM AUTHOR]

Published
2022
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20. Elevated-Metal–Metal-Oxide Thin-Film Transistor: Technology and Characteristics.

Author

Lu, Lei, Li, Jiapeng, Feng, Zhuoqun, Kwok, Hoi Sing, and Wong, Man

Subjects
THIN film transistors, HEAT treatment, PASSIVATION, ZINC oxide, ELECTRODES
Abstract

A new device architecture, dubbed elevated-metal–metal-oxide (EMMO) thin-film transistor (TFT), is presently proposed. During a heat-treatment process in oxygen, conductive source and drain regions spontaneously populated by donor defects are formed, while the defects in the channel region are simultaneously passivated. Compared with that of the conventional back-channel-etched TFT, this architecture inherently accommodates an etch-stop/passivation layer without increasing the mask count. EMMO TFT demonstrated using indium–gallium–zinc oxide as an active layer exhibited good performance metrics: a peak field-effect mobility of \sim 14 cm2/Vs, a steepest pseudo-subthreshold slope of \sim 120 mV/decade, a leakage current lower than \sim 10^-14 A, an on/off -current ratio above \sim 10^10 , and stability against environmental and electrical stress. [ABSTRACT FROM PUBLISHER]

Published
2016
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