Search

A new device design in trench-gate insulated gate bipolar transistor (IGBT) with dual gate control is proposed for high switching controllability with low loss operation. Injection enhancement effect is effective to obtain low power loss operation of IGBTs. However, excess drift carriers limit turn-off dV/dt, and turn-on dI/dt, and the switching controllability by the external gate resistance is degraded. Surface buffer (SB) IGBT with dual gate control is effective to improve the switching controllability, because the hole current can be modulated effectively by the p-MOS control. TCAD simulation results show the SB-IGBT type-II with dual gate control is the best choice for good turn-off and turn-on switching performances. [ABSTRACT FROM AUTHOR]

A design direction in surface buffer insulated gate bipolar transistor (SB-IGBT) is shown for improvement of turn-on switching characteristics, such as switching controllability, current surge and turn-on loss. At turn-on switching, hole current around the gate degrades the switching controllability and induces EMI noise due to negative gate capacitance. However, SB-IGBT can be designed to suppress the negative gate capacitance by enhancement of hole evacuation through pMOS channel. Although turn-on loss can be decreased by small gate-collector capacitance ${C}_{{gc}}$ , the influence of negative gate capacitance is remarkable. Therefore, TCAD simulation results show that high hole evacuation through pMOS channel and optimum ${C}_{{gc}}$ design are effective to improve turn-on switching characteristics. [ABSTRACT FROM AUTHOR]

An ultralow specific on-resistance (Ron, sp) integrable silicon-on-insulator (SOI) power lateral MOSFET is proposed. The MOSFET features double trenches: an oxide trench in the drift region and a trench gate extended to the buried oxide (BOX) (SOI DT MOSFET). First, the oxide trench causes multiple–directional depletion, which leads to electric field reshaping and an enhanced reduced surface field effect in the SOI layer. The electric field distributions in the SOI and BOX are thus improved. The oxide trench also increases the electric field strength in the x-direction due to the lower permittivity of oxide than that of Si. Both increase breakdown voltage (BV). Second, the trench makes the drift region folded in the y -direction, resulting in reduced cell pitch and Ron, sp . Third, the trench gate extended to the BOX further reduces Ron, sp by widening the vertical conduction area. The BV of the DT MOSFET increases from 91 V of the conventional SOI LDMOS to 233 V at a half-cell pitch of 6.5 \mu\m, and the Ron, sp decreases from 5.1 to 3.3 \m\Omega\cdot\cm^2. [ABSTRACT FROM AUTHOR]

In this letter, we propose a new trench-gate power MOSFET with buried oxide in its drift region that shows an improvement in the breakdown performance as compared to the conventional trench device due to a reduction in the vertical electric field. In addition, the proposed device shows about linear relation between the BV and RON as compared to the 2.5th power relation in the conventional device. [ABSTRACT FROM AUTHOR]

We present a new trench gate power IGBT with superjunction structures in its drift region, which exhibits a strongly improved relationship between blocking voltage, and ON-resistance. An accurate control of the impurity concentration of then drift region in the trench sidewall is important in achieving the performance of the proposed IGBT, and angle ion implantation is considered to be the most suitable method for its fine controllability; therefore, we optimized the trench sidewall doping by adjusting the implanted ion dosage and incident angles. In addition, source and gate contacts are realized by self-aligned silicides technology; therefore, the devices are made fully self-aligned with two masks-one for trench and another for source and body doping selection. The output I-V characteristics and threshold voltage are measured after the devices were fabricated. [ABSTRACT FROM AUTHOR]