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We report one-volt TiO2 thin film transistors (TFTs) with a low-temperature fabrication process. The TFTs with the 300 °C-annealed TiO2 channel exhibit a high on/off current ratio ( $\text{I}_{ \mathrm{\scriptscriptstyle ON}}/\text{I}_{ \mathrm{\scriptscriptstyle OFF}})$ of $5.4\times 10^{7}$ , a low subthreshold swing (SS) of 75 mV/dec and a saturation field effect mobility ( $\mu _{{\mathrm {sat}}}$ ) of 2.13 cm $^{2}\cdot V^{-1}\cdot s^{-1}$ under an ultra-low voltage of 1 V. In contrast, the TFTs with the 200 °C-annealed TiO2 channel show no appreciable currents. Such a distinct conductivity difference is attributed to the crystallinity transformation of stoichiometric TiO2, the charge transport of which can be well explained by the multiple-trapping-and-release (MTR) model. The channel/dielectric interfaces of these one-volt TiO2 TFTs are further investigated by transmission electron microscopy (TEM), multi-frequency ( ${f}$ ) capacitance-voltage (C-V), and conductance-voltage (G-V) measurements. The interface trap density ( $\text{D}_{{\mathrm {it}}}$ ) values of $\sim 5\times 10^{12}$ cm $^{-2}\cdot {\mathrm {eV}}^{-1}$ obtained from both C-V and G-V measurements are in good agreement, suggesting a high-quality channel/dielectric interface. These one-volt TiO2 TFTs show a great potential in emerging applications, such as foldable displays and wearable sensors, where a battery-powered operation is required.

In this letter, a subthreshold swing (SS) of sub-60 mV/dec is for the first time observed in InAlN/GaN high electron mobility transistors (HMETs). With a 40-nm gate length ( ${L} _{{\text {g}}}$ ), an average SS of 30 mV/dec over three orders of magnitude in drain current ( I d) and a minimum point-by-point SS of 15 mV/dec are achieved. The transistor body factor ( m ) of 4.99/6.98 (in forward/reverse sweep) determined from temperature-variation measurements indicates that the sub-60 mV/dec SS characteristic is not attributed to the negative capacitance effect. The negative differential resistance (NDR) of gate current ( I g) is observed and the hot electron transfer from channel to gate is believed to account for the sub-60 mV/dec SS characteristic. It is further confirmed by the fact that, SS decreases as drain-source voltage ( V ds) increases and L g decreases. Due to the increased V ds and decreased $L_{\text {g,}}$ the channel lateral electric field is strengthened, leading to the hot electron formation and thus the enhanced effect of hot electron transfer on the SS. This sub-60 mV/dec SS characteristic in the nanoscale devices shows the great potential of the InAlN/GaN HEMTs to be applied in future logic switches.

In this letter, we report ultrathin-body (~15 nm) TiO2 thin film transistors (TFTs) with unprecedented electrical performance: ON-current density ( $I_{\text{on}}$ ) of 16.7 mA/mm, ON/OFF current ratio ( $I_{\text{ON}}/I_{\text{OFF}}$ ) of $1.2 \times 10^{9}$ and subthreshold swing (SS) of 101 mV/dec. The TiO2 channel layer was deposited by thermal atomic layer deposition (ALD) followed by post-annealing in O2 ambient. The material characterizations indicate the formation of anatase TiO2 polycrystalline films and a lack of detectable oxygen vacancies, which could have acted as charging traps in channel and channel/dielectric interface, benefiting the $I_{\text{ON}}$ and the SS. These high-performance ultrathin-body TiO2 TFTs open a new venue in many applications such as high-resolution display and radiofrequency identification (RFID) tag, where high on currents and steep SS are required.

Combining a pseudomorphically strained (Ga,In)P emitter with a GaAs0.6Sb0.4 base effectively eliminates the emitter heterojunction type-II conduction band offset in InP/GaAsSb double heterojunction bipolar transistors (DHBTs). A peak fT of 436 GHz at JC = 10 mA/mum2, with BVCEO = 3.8 V, is achieved with 0.6 times 5 mum2 InP/GalnP/GaAsSb DHBTs with a 75-nm InP collector. Compared to a binary InP emitter, the (Ga,In)P emitter doubles the DC current gain from 166 to 338 for otherwise identical devices. These are the highest DC current gain and cutoff frequencies to date in uniform base GaAsSb DHBTs. The gain improvement reported here will greatly facilitate device design tradeoffs that are encountered while scaling InP/GaAsSb DHBTs toward higher frequencies by allowing higher base doping levels and smaller emitter geometries.

Good-quality metamorphic InP buffer layers have been successfully grown on GaAs substrates by metal-organic chemical vapor deposition. Characterization by atomic force microscope, transmission electron microscopy, high-resolution X-ray diffraction, and Hall measurements indicated that the layers are of high crystalline quality, good mobility, and excellent surface morphology. On this buffer, we demonstrated the first metamorphic InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) with good material quality and device performance. Metamorphic DHBTs showed direct-current and radio-frequency characteristics that are comparable to those grown on lattice-matched InP substrates.

We report the realization of 0.3-μm emitter InP/GaAsSb/InP DHBTs with cutoff frequencies fT = 365 GHz and fMAX = 501 GHz. Our devices were implemented with a 15-nm C-doped graded base and a 125-nm InP collector and feature a peak current gain β = 35, with a base sheet resistance RSH = 1160 Ω/sq. The present transistors are the first InP/GaAsSb DHBTs to feature fMAX = 500 GHz, according to three extraction schemes. The present transistor performance is limited by an undepleted collector layer associated with a doping tail extending from the subcollector.

We report self-aligned 0.3-μm emitter InP/GaAsSb/ InP DHBTs featuring a common-emitter current gain of 46 and cutoff frequencies fT = 400 GHz and fMAX = 322 GHz for devices implemented with a 20-nm C-doped base and a 75-nm InP collector. Our DHBTs display attractive noise properties with a minimum noise figure NFmin = 1.2 dB at 20 GHz, which is nearly independent of frequency over the 2-20-GHz measurement band. This represents an improvement of at least 2.3 dB with respect to previously published results for GaAsSb-based devices, due to process improvements that allow good RF characteristics to be maintained at the low current levels required for low noise operation. Analysis shows that the low-frequency NFmin is limited by the relatively low current gain values typical of III-V HBTs. InP/GaAsSb DHBTs could be attractive low-noise devices for higher frequencies.