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This article proposes an 18-switch five-level inverter topology for induction motor (IM) drives, enabling an extended linear modulation range (LMR) till full base speed. The power circuit consists of a conventional NPC three-level inverter and a standard two-level inverter feeding the opposite phase winding ends of an open-ended winding IM. The proposed inverter achieves a voltage space vector radius of $0.955~{V}_{\text {dc}}$ and a maximum peak fundamental phase voltage of $0.637~{V}_{\text {dc}}$ in its LMR compared to a conventional five-level inverter with the corresponding figures of 0.866 and $0.577~{V}_{\text {dc}}$ , respectively. This improvement arises from the fact that in the overmodulation region spanning from 0.577 to $0.637~{V}_{\text {dc}}$ , the standard five-level inverter operates in a six-step mode, resulting in the voltage space vector trace a hexagonal path producing a lower-order harmonic-rich phase voltage. The proposed power circuit effectively addresses this issue by ensuring a circular locus for the voltage space vector up to a radius of $0.955~{V}_{\text {dc}}$ resulting in a maximum peak fundamental voltage of $0.637~{V}_{\text {dc}}$ . Consequently, it extends the linear speed range of the motor to the full base speed without lower-order harmonic problems.

The voltage drift control of series-connected capacitors across a single dc-link is the major challenge for a multineutral point-clamped (NPC) converter. This drifting is caused due to uneven currents drawn from the neutral points (NPs) during the PWM operation. This work presents the working principle of instantaneous voltage control of “ $n$ ” dc-link series-connected capacitors for an induction machine load. The mechanism of instantaneous voltage balancing is realized by ensuring zero instantaneous currents at each dc-link NP. To get zero instant currents at a dc-link NP branch, the phase terminals tapping on the dc-link are manipulated with the help of cascaded hybrid bridges (CHBs). Charge balancing of CHB capacitors is also taken care of by proper utilization of pole voltage redundancies. The detailed results are presented for a small-scaled inverter (nine-level) with three NPs (four dc-link capacitors). The simulation and experimental results reflect the capability and limitations of such inverters. The results are presented at all modulation indexes operated under low-power-factor (LPF) and high-power-factor (HPF) load conditions. It is found that the linear modulation range (LMR) can be increased to full base speed even for an HPF load.