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Static frequency dividers are widely used technology performance benchmark circuits. Using a 0.25\,\mu\ m 530\,GHz f T/600\,GHz+ f \max InP DHBT process, a static frequency divider circuit has been designed, fabricated, and measured to operate up to 200.6 GHz refid="ref1"/ . The divide-by-two core flip-flop dissipates 228 mW. Techniques used for the divider design optimization and for selecting variants to maximize performance across process changes are also discussed. [ABSTRACT FROM PUBLISHER]

Describes a broad-band switch mode power amplifier based on the indium phosphide double heretojunction bipolar transistor technology. Combination of alternative Class-E mode of operation with a harmonic termination technique; Minimization of the insertion loss of matching circuitry; Use of transmission line topology to achieve broad-band harmonic terminations.