12 results on '"Manuel E. Acacio"'
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2. Concurrent Irrevocability in Best-Effort Hardware Transactional Memory.
3. Way Combination for an Adaptive and Scalable Coherence Directory.
4. ZEBRA: Data-Centric Contention Management in Hardware Transactional Memory.
5. Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory.
6. Eager Beats Lazy: Improving Store Management in Eager Hardware Transactional Memory.
7. Efficient Hardware Barrier Synchronization in Many-Core CMPs.
8. A Direct Coherence Protocol for Many-Core Chip Multiprocessors.
9. Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level.
10. Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures.
11. A Two-Level Directory Architecture for Highly Scalable cc-NUMA Multiprocessors.
12. An Architecture for High-Performance Scalable Shared-Memory Multiprocessors Exploiting On-Chip Integration.
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