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The growth of IoT applications requires DC-DC converters to have small printed circuit board (PCB) areas and high efficiency over a wide load range. A multi-mode operation of DC-DC converters, therefore, is often necessary to achieve this high efficiency over a wide load range. This paper introduces a tri-mode DC-DC buck converter for IoT applications. The tri-mode operation with PWM, PFM, and multiple-sawtooth PWM (MSPWM) modes helps to retain the high efficiency over the wide load range. The MSPWM mode also enhances a noise margin of the converter, ensuring a regular switching operation at an ultra-light load condition. With a load current prediction scheme, the proposed tri-mode converter requires neither additional load current sensor nor multiple mode controllers. In addition, a soft-start operation is employed to prevent an in-rush current. The proposed tri-mode buck converter has been fabricated through a 0.18- $\mu \text{m}$ CMOS process with a chip area of 0.97 mm $\times0.88$ mm. A load-dependent seamless mode transition is realized, and a maximum converter efficiency of 91% has been measured with a 7.4-MHz switching frequency. [ABSTRACT FROM AUTHOR]

It is essential to retain improved efficiency in a dc–dc converter over a wide load current range to extend the battery-life in portable devices. This requires a multi-mode controller, consisting of pulse-width-modulation (PWM) and pulse-frequency-modulation (PFM) schemes. However, existing approaches attempt to integrate structurally different controllers; thus it is difficult to achieve a seamless controller transition. While a digital platform offers controller configurations, it remains difficult to identify a suitable digital PWM/PFM technique and decide on its sampling mechanism to achieve stable behavior. This paper proposes a unified digital PWM/PFM scheme which shares a common digital PWM (DPWM) block and has the provisions for online controller configuration and automatic (switching) frequency adaptation. The proposed scheme retains improved efficiency over a wide operating range and inherently achieves seamless controller transitions. Further, a unified discrete-time framework is proposed for the analysis and design of the proposed multi-mode controller. Buck and boost converter prototypes are tested and the proposed controller is implemented using a field-programmable-gate-array device. [ABSTRACT FROM AUTHOR]

Models of inverters and other converters based on averaging have been widely used in numerous simulation applications. Generalized averaging can be applied to model both average and switching behavior of converters while retaining the faster run times associated with average-value models. Herein, generalized average models for single- and three-phase pulse width modulation inverters are proposed. These models are based on a quasi-Fourier series representation of the switching functions that includes fundamental and switching frequency components as well as sideband components of the switching frequency. The proposed models are demonstrated both in simulation and experimentally and are found to accurately portray both the fundamental and the switching behavior of the inverter. In particular, the use of sideband components allows accurate representation of the variation in switching ripple magnitude that occurs in the steady state. The generalized average models are found to have simulation run times that are significantly faster than those associated with detailed models. Therefore, the proposed generalized average models are suitable for simulation applications in which both accuracy (including the switching behavior) and fast run times are required (e.g., long simulation times, systems with multiple converters, and repeated simulations). [ABSTRACT FROM AUTHOR]

An output voltage ripple aware design of different voltage ramp signal of voltage-mode CCM random frequency buck converter for conductive EMI reduction is presented. A mathematical analysis has been carried out to model the output voltage ripple of random switching converter. Simulations of the converter have been undertaken and measured results from the converter fabricated with a standard 0.35 \mum CMOS process verify the proposed design approach. From experimental results, a carefully designed ramp can reduce the output voltage ripple by more than 8 times without significant influence on the inductor current spectrum spread and any increment on the output filtering inductance and capacitance comparing to the conventional design. [ABSTRACT FROM AUTHOR]

A dual modulation technique to improve power conversion efficiency with minimal increase in output voltage ripple is presented. The worsening switching noise caused by parasitic resistance and inductance due to high-switching operation can also be alleviated by the proposed ac ripple detector. Furthermore, the dual modulation method can speed up the load transient response since the switching frequency can increase to 5 MHz during the transient period. At very light loads, the switching frequency is always kept higher than the acoustic frequency to avoid noisy sound. Experiment results show that the converter operates at 5 MHz using a small inductor of 1 \mu \H. The load transient response time is shorter than 3 \mu \s when load current changes from 150 to 450 mA or vice versa. Power efficiency is kept higher than 85% over a wide load current range. Specifically, light efficiency can be raised to about 45% above that of the conventional design. [ABSTRACT FROM PUBLISHER]