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This paper presents a series of multi-stage hybrid memristor-CMOS ternary combinational logic stages that are optimized for reducing silicon area occupation. Prior demonstrations of memristive logic are typically constrained to single-stage logic due to the variety of challenges that affect device performance. Noise accumulation across subsequent stages can be amortized by integrating ternary logic gates, thus enabling higher density data transmission, where more complex computation can take place within a smaller number of stages when compared to single-bit computation. We present the design of a ternary half adder, a ternary full adder, a ternary multiplier, and a ternary magnitude comparator. These designs are simulated in SPICE using the broadly accessible Knowm memristor model, and we perform experimental validation of individual stages using an in-house fabricated Si-doped HfOx memristor which exhibits low cycle-to-cycle variation, and thus contributes to robust long-term performance. We ultimately show an improvement in data density in each logic block of between $5.2\times - 17.3\times $ , which also accounts for intermediate voltage buffering to alleviate the memristive loading problem. [ABSTRACT FROM AUTHOR]

This paper is concerned with bipartite tracking for double-integrator networked systems with signed communication graphs, where both cooperative and antagonistic interactions coexist. A finite-time bipartite tracking framework is established, where followers track either the state or the opposite state of a leader. Different from some conventional results with convergence over an infinite time horizon, the finite-time convergence in this paper is achieved in an accurate manner. Under structurally balanced signed graphs, an integral sliding mode based finite-time bipartite tracking controller is proposed. The construction of an integral sliding mode variable is to ensure that the system dynamics is driven onto a sliding surface in finite-time. On the sliding surface, neighbouring states are used together with the homogeneous technique to guarantee that bipartite tracking is achieved in finite-time. To further realize fixed-time bipartite tracking, a controller is designed by using the integral sliding mode and the bi-limit homogeneous concept. Finally, numerical examples are provided to demonstrate the effectiveness of the proposed controllers. [ABSTRACT FROM AUTHOR]

In this paper, a novel adaptive second-order sliding mode (SOSM) control method is proposed by combining a new adaptive strategy with the backstepping-like technique. The new adaptive strategy is first constructed by means of the equivalent control for which a sliding-mode-based filter is employed rather than the widely-used low-pass filter such that the parameter restriction under the usage of low-pass filter can be relaxed. Then, by applying the proposed adaptive strategy and the idea of adding a power integrator, an adaptive SOSM method is established to finite-time stabilize the sliding variables. The feature of the proposed SOSM method lies in that the gain will vary with the size of the lumped uncertainty so as to avoid the overestimation of the gain. The stability analysis is given based on the finite-time Lyapunov theory. The theoretical results are finally applied to the voltage regulation problem of a Buck converter. [ABSTRACT FROM AUTHOR]

We present a circuit technique to extract true random numbers from carrier capture and emission in oxide traps in the emerging redox-based resistive memory (ReRAM). This phenomenon that appears as small changes in current magnitude passing through the device is known as random telegraph noise (RTN) and is increasingly becoming a source of reliability issues in nanometer-scale devices. We demonstrate a circuit that exploits TRN suitable for a true random number generator (TRNG) in security applications, where the system is secure from different adversarial attacks, including side-channel monitoring and machine learning analysis. We experimentally characterize RTN in ReRAMs and extract its dependency to temperature, voltage, and area. We introduce an RTN harvesting circuit to mitigate sensitivities to temperature fluctuations, injected supply noise, and power signal monitoring. We reduced bias and imbalance in data due to high-speed sampling via von Neumann whitening. The circuit is compared to conventional non-differential readout approach. Our approach shows a 7.26 times improvement in autocorrelation and significant resilience against the injected supply noise. We also demonstrate the TRNG’s quality and robustness using statistical tests and machine learning attacks. The output of the generator satisfies statistical tests for randomness and is immune to modeling attacks based on the machine learning methods. [ABSTRACT FROM AUTHOR]