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Scaling down the supply voltage (Vdd) below the transistors threshold voltage (Vth) has become a very popular technique in designing Ultra-Low-Power circuits whose demand has dramatically increased in the last few years. Designing these kinds of circuit is still a challenge, especially when the latest advanced process technologies are employed. The well-known design methodology used in the typical super-threshold domain (Vdd>Vth) cannot be applied to the design of a sub-threshold circuit due to the different transistor current-voltage relationships that hold when Vdd

This paper provides an original closed-form analytical model of frequency-pulling phenomenon in unlocked-driven nonlinear oscillators. The formulas are more general and accurate in estimating the spectral components and degree of phase perturbation of the unlocked driven oscillator under weak as well as strong injection signal level. The accuracy and superiority of the proposed analytical model in predicting injection locking of oscillators in strong injection signal level over prior literature have been established analytically and experimentally. [ABSTRACT FROM AUTHOR]

We develop an accurate analytical expression for the propagation delay of submicrometer CMOS inverters that takes into account the short-circuit current, the input-output coupling capacitance, and the carrier velocity saturation effects, of increasing importance in submicrometer CMOS technologies. The model is based on the nth-power-law MOSFET model and computes the delay from the charge delivered to the gate. Comparison with HSPICE level 50 simulations and other previously published models for a 0.18-μm and a 0.35-μm process technologies show significant improvements over previous models. [ABSTRACT FROM AUTHOR]