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In this paper, new digital predistortion (DPD) solutions for power amplifier (PA) linearization are proposed, with particular emphasis on reduced processing complexity in future 5G and beyond wideband radio systems. The first proposed method, referred to as the spline-based Hammerstein (SPH) approach, builds on complex spline-interpolated lookup table (LUT) followed by a linear finite impulse response (FIR) filter. The second proposed method, the spline-based memory polynomial (SMP) approach, contains multiple parallel complex spline-interpolated LUTs together with an input delay line such that more versatile memory modeling can be achieved. For both structures, gradient-based learning algorithms are derived to efficiently estimate the LUT control points and other related DPD parameters. Large set of experimental results are provided, with specific focus on 5G New Radio (NR) systems, showing successful linearization of multiple PA samples as well as a 28 GHz active antenna array, incorporating channel bandwidths up to 200 MHz. Explicit performance-complexity comparisons are also reported between the SPH and SMP DPD systems and the widely-applied ordinary memory-polynomial (MP) DPD solution. The results show that the linearization capabilities of the proposed methods are very close to that of the ordinary MP DPD, particularly with the proposed SMP approach, while having substantially lower processing complexity. [ABSTRACT FROM AUTHOR]

In this paper, we show that amplitude transitions that are inherent to the multilevel outphasing radio transmitter architecture distort the transmitted signal due to time-domain discontinuities. In order to address this challenge, we propose a new transmitter architecture called tri-phasing which avoids discontinuities in signal waveforms and thus achieves significantly better linearity than multilevel outphasing. The output waveform in tri-phasing can be made continuous by representing the baseband signal with three components. One of the three components is amplified by discrete amplitude steps, whereas the other two are used to compensate the instantaneous shift in the output waveform due to the discrete amplitude step and to provide fine amplitude resolution. An implementation of the tri-phasing transmitter requires three phase modulators and additional digital signal processing. The system-level simulations performed in this paper demonstrate that the ACLR of a multilevel outphasing transmitter with 4 amplitude levels and 10-bit phase resolution is limited to −48 dBc, when simulated with a 100 MHz carrier-aggregated LTE downlink signal at 2.46 GHz carrier frequency. The proposed tri-phasing transmitter achieves −58 dBc ACLR with the same simulation parameters, indicating that continuous amplitude transitions can significantly improve the transmitter linearity. [ABSTRACT FROM AUTHOR]

Radio transmitters are evolving towards digital-intensive solutions to exploit reconfigurability and benefit from CMOS process scaling. Outphasing has been identified as a suitable candidate for digital wideband transmitters. However, with recent digital-intensive outphasing transmitters the achieved performance in terms of adjacent channel leakage ratio (ACLR) has been limited. This paper identifies the sampling images of the modulating phase signal as the main factor limiting the ACLR of digital outphasing transmitters. We present a new digital interpolating phase modulator architecture, capable of providing significantly better sampling image attenuation. When evaluated in outphasing configuration with a 100 MHz OFDM signal at the carrier frequency of 2.46 GHz, and 10-bit phase resolution, the proposed solution achieves an ACLR of $-$59 dBc, compared to $-$ 43 dBc achievable with the phase modulator architecture utilized in state-of-the-art digital outphasing transmitters. The proposed digital interpolating phase modulator is also capable of custom carrier generation, a straightforward method for generating an arbitrary carrier frequency up to 1.25 times the phase modulator sampling rate. [ABSTRACT FROM AUTHOR]

This article proposes a novel adaptive architecture for blind identification and compensation of frequency response mismatches in 4-channel time-interleaved analog-to-digital-converters (TI-ADCs). Detailed frequency response mismatch modeling is first carried out elaborating in detail the interleaving mismatch spurs characteristics. Stemming from the established mirror-frequency crosstalk nature of the different mismatch spurs, the interleaving mismatch identification process is then carried out using complex second-order statistics based methods. The developed learning algorithm performs the mismatch identification and learns the mismatch compensation filter parameters in a blind manner for almost the full digital bandwidth of the 4 TI-ADC system. The proposed solution's efficiency and performance are verified and demonstrated using state-of-the-art RF-sampling TI-ADC hardware measurements with GHz range instantaneous bandwidth. In addition to this, the relationship between a four-channel TI-ADC and an I/Q sampling 2-channel TI-ADC is explored and an interesting link between the two is established in this work. [ABSTRACT FROM AUTHOR]