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This paper presents an overview of proximity wireless communication (PWC) technologies, their principles, design guidelines and practical applications. In particular, two different applications of PWC are reviewed. One is PWC between stacked chips. Both communication distance and coupler size are several tens of microns. Area and energy efficient design techniques are introduced. Another is PWC between module boards. Both communication distance and coupler size are several millimeters. Energy and area efficient practical designs are introduced for mobile and industrial machinery applications. [ABSTRACT FROM AUTHOR]

A 28.8-GB/s 96-MB 3D-stacked SRAM is presented. A total of eight SRAM dies, designed in a 40-nm CMOS process, are vertically stacked and connected using an inductive coupling wireless link with a low-voltage NMOS push-pull transmitter that reduces the power of the link by 35% with a 0.4-V power supply. The SRAM utilizes an inverted bit insertion scheme that compensates for the degradation of the first transmitted bit, a coil termination scheme that aims to eliminate the ringing of 3D inductive coupling bus, and a 12:1 SerDes that minimizes power consumption and area overhead in inductive coupling channels. Low-power, large-capacity, 3-cycle latency 3D-stacked SRAM for a DNN accelerator is achieved with the combination of these techniques to serve as a replacement of 3D-stacked DRAM. The performance of the proposed 3D-SRAM is compared with HBM DRAM and achieves more than 50% lower energy consumption. The scaling scenario of the SRAM module is discussed in light of the scaling of the inductive coupling technology and logic process. [ABSTRACT FROM AUTHOR]

A 280 Mb/s non-contact in-vehicle LAN system using electromagnetic clip connectors is presented. The bidirectional transmission line coupler based electromagnetic clip connector, which can be used to make local area network connections similar to clips, suppresses the signal reflections on the bus enabling 280 Mb/s data rate which is 7 times faster than the state-of-the-art in-vehicle LAN transceiver. Since all modules are connected with the shortest distance, this connection system can reduce wire harness weight by 30%. Forward error correction is done by $N$-x Manchester encoding on the transmitter side and majority voting on the receiver side. High noise immunity is achieved through synchronous receiving by the digital clock recovery circuit which is robust against noise. Communication tests were conducted at 280 Mb/s with 10 transceivers fabricated in 65 nm CMOS technology connected by a 10 m unshielded twisted pair cable. Evaluation of the bit error rate and radiation spectrum confirmed that the ISO specifications concerning electromagnetic susceptibility and the CISPR ones concerning electromagnetic interference are satisfied. [ABSTRACT FROM AUTHOR]

An 8.5-Gb/s/link non-contact multi-drop bus is presented. The signal reflections that limit the data rates of conventional multi-drop bus interfaces are dramatically reduced by using transmission line couplers at each signal branching point. As an energy-equipartitioned technique provides the same signal level to every port, wider receiver margin is achieved. The data rate is improved by 1.8 times compared to the most advanced multi-drop bus interface. The theoretical analysis and design techniques of energy-equipartitioned transmission line couplers are discussed in this paper. The design methodologies were verified through simulations performed by using a full-3D EM-simulator and experiments with FR4 test boards. Due to the low-cut characteristics of the couplers, the low-frequency components are cut off so that differentiated pulses arrive at the receiver input point. A receiver detects and recovers the received pulses by integrating them using hysteresis characteristics. The design techniques of the transceiver for the transmission line couplers are also discussed in this paper. The proposed methods were verified by using a test chip fabricated with a 90-nm CMOS process. Experiments with a prototype of an eight-drop multi-drop bus system confirmed BER < 10^-14 at a data rate of 8.5-Gb/s/link. The measured timing margin at the far-end module was 0.49-UI at a BER of 10^-12. The power consumption of the transceiver was 75.6-mW at a supply voltage of 1.2-V. [ABSTRACT FROM PUBLISHER]

This paper presents a power reduction scheme and an area reduction scheme in inductive-coupling programmable bus for NAND flash memory stacking. A channel arrangement scheme using three coils enables random access for memory read and memory write. Transmit power is reduced by 47% compared to a previous design with shields. A coil layout style, herein noted as XY coil, allows for the coils to interleave with logic interconnections, resulting in area reduction of 91% relative to refid="ref1"/ at the expense of only 17% transmit power increase. Relayed data transmission at 1.6 Gb/s and \BER<10^-12 is achieved. [ABSTRACT FROM PUBLISHER]

A novel communication system which simultaneously achieves the mobility of wireless communication and the low-power performance of wireline communication is developed with a printable sheet. By combining meter-scale wireline communication and micrometer-scale wireless capacitive-coupling communication, the proposed communication system enables multiple electronic objects scattered over tables, walls, and ceilings to communicate contactlessly with each other by establishing communication paths without cumbersome physical connections. The transceiver developed for the 20 cm × 20 cm communication sheet features a data-edge-signaling transmitter and a dc power-free pulse detector, thereby achieving the lowest energy of 107 pJ/bit at 100 kb/s in wireless communications at a distance of 60 cm in 0.18-μm CMOS. [ABSTRACT FROM AUTHOR]