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The requirement of ultralow power and energy efficient systems is becoming more and more important with the increase in the use of miniaturized portable devices and unsupervised remote sensor systems. 3-D integration is an emerging technology that helps in reducing footprint as well as power. In this paper, we study in detail the combined benefits of 3-D ICs and low-voltage supply designs to obtain maximum energy efficiency. We implement different types of circuits in conventional 2-D and through-silicon-via-based 3-D designs at different supply voltages varying from nominal to subthreshold voltages. The impact of 3-D integration on these different types of circuits is analyzed. Our study is based on power and energy comparison of full GDSII layouts. Our study confirms that subthreshold/near-threshold circuits indeed offer a few orders of magnitude power versus performance tradeoff with further improvement due to 3-D implementation. In addition, 3-D designs reduce the footprint area up to 78% and wirelength up to 33% compared with the 2-D counterpart for individual design benchmarks. Our studies also show that thermal and IR drop issues are negligible in subthreshold 3-D implementation due to its extreme low-power operation. Finally, we demonstrate the low-power and high-memory bandwidth advantages of many-core 3-D subthreshold circuits. [ABSTRACT FROM PUBLISHER]

In this paper, we present a methodology for the automatic generation of layout for radio frequency (RF) designs using embedded passives. Our methodology is divided into three steps: 1) pre-layout optimization; 2) placement and routing; and 3) post-layout optimization. We show that our methodology generates layouts with small area and good performance response within a fraction of design time compared with fully manual design effort. We make use of circuit models to represent and optimize the physical layout of the resistance-inductance-capacitance (RLC) components as well as the entire RF circuit that uses them. We perform non-linear mathematical programming-based optimization at various stages of the methodology to achieve high quality layouts. Full wave electromagnetic simulations are kept completely out of the design loop, so our methodology significantly reduces design time. We have used our methodology to successfully generate layouts for large-scale filter circuits. [ABSTRACT FROM PUBLISHER]