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Recent advances in continuous-flow microfluidics have enabled highly integrated lab-on-a-chip biochips. These chips can execute complex biochemical applications precisely and efficiently within a tiny area, but they require a large number of control ports and the corresponding control logic to generate required pressure patterns for flow control, which, consequently, offset their advantages and prevent their wide adoption. In this article, we propose the first flow-control layer co-synthesis flow called MiniControl, for continuous-flow microfluidic biochips under strict constraints for control ports, incorporating high-level synthesis, physical design, and control system design simultaneously, which has never been considered in previous work. With the maximum number of allowed control ports specified in advance, this synthesis flow aims to generate biochip architectures with high execution efficiency and the corresponding control systems with optimized timing performance. Besides, the overall cost of a biochip can be reduced and the tradeoff between a control system and execution efficiency of biochemical applications can be evaluated for the first time. The experimental results demonstrate that MiniControl leads to high execution efficiency, low platform cost, as well as excellent timing performance, while strictly satisfying the given control-port constraints. [ABSTRACT FROM AUTHOR]

Programmable microfluidic devices (PMDs) have emerged as a new software-controlled architecture for next-generation flow-based biochips. These devices can be dynamically reconfigured to perform different bioassays flexibly and efficiently owing to their 2-D regularly arranged valve structure. However, PMDs are confronted with critical contamination issues due to the matrix-like structure with intersecting channels. In this article, a block-flushing method is proposed for contamination removal, based on which an overall contamination-aware synthesis flow is proposed. In the proposed block-flushing approach, contaminated areas are first collected according to specific patterns and then flushed as a whole to increase washing efficiency. Then, the synthesis flow integrating the block-flushing method is further optimized such that functional bioassay operations and washing operations can be performed simultaneously for higher efficiency. Experimental results demonstrate that the proposed washing approach reduces the washing time by 28% on commonly used bioassays. Equipped with the proposed washing method, our contamination-aware synthesis flow effectively reduces 30% of the completion time of the bioassays compared with the baseline method. [ABSTRACT FROM AUTHOR]

Continuous-flow microfluidic biochips have attracted high research interest over the past years. Inside such a chip, fluid samples of milliliter volumes are efficiently transported between devices (e.g., mixers, heaters, etc.) to automatically perform various laboratory procedures in biology and biochemistry. Each transportation task, however, requires an exclusive flow path composed of multiple contiguous microchannels during its execution period. Excess/waste fluids, in the meantime, should be discarded by independent flow paths connected to waste ports. All these paths are etched in a very tiny chip area using multilayer soft lithography and driven by flow ports connecting with external pressure sources, forming a highly integrated chip architecture that determines the final performance of biochips. In this article, we propose a new and practical design flow called PathDriver+ (PD+) for the architecture design of microfluidic biochips, integrating the actual fluid manipulations into both high-level synthesis and physical design, which has never been considered in prior work. With this design flow, highly efficient chip architectures with a flow-path network that enables the actual fluid transportation and removal can be constructed automatically. Meanwhile, fluid volume management between devices and flow-path minimization are realized for the first time, thus, ensuring the correctness of assay outcomes while reducing the complexity of chip architectures. Additionally, diagonal channel routing is implemented to fundamentally improve the chip performance. The tradeoff between the numbers of channel intersections and fluidic ports is evaluated to further reduce the fabrication cost of biochips. The experimental results on multiple benchmarks confirm that the proposed design flow leads to high assay execution efficiency and low overall chip cost. [ABSTRACT FROM AUTHOR]

Flow-based microfluidic biochips have attracted much attention in the EDA community due to their miniaturized size and execution efficiency. Previous research, however, still follows the traditional computing model with a dedicated storage unit, which actually becomes a bottleneck of the performance of biochips. In this article, we propose a distributed channel-storage architecture (DCSA) to cache fluid samples inside flow channels temporarily. Since distributed storage can be accessed more efficiently than a dedicated storage unit and channels can switch between the roles of transportation and storage easily, biochips with this architecture can achieve a higher execution efficiency even with fewer resources. Furthermore, we also address the flow-path planning that enables the manipulation of actual fluid transportation/caching on a chip. The simulation results confirm that the execution efficiency of a bioassay can be improved significantly, while the number of valves in the biochip can be reduced accordingly. Also, flow paths for transportation tasks can be constructed and planned automatically with minimum extra resources. [ABSTRACT FROM AUTHOR]

Flow-based microfluidic biochips have become a promising platform for complex biochemical assays. As the integration of such chips is increasing, a flexible general reconfigurable platform, fully programmable valve array (FPVA), has emerged. Such a 2-D array comprises regularly arranged valves using which flow-networks with different geometry, size, and connectivity can be constructed dynamically. However, the test generation for such arrays becomes challenging due to the large number of potential flow-networks and transportation paths that can be configured on-chip. In this article, we propose a strategy to generate efficient test patterns for FPVAs based on the concepts of test paths and cuts. These patterns together can cover multiple faults in both flow and control layers. We also introduce the concept of test trees and multiple cuts for a test pattern to deal with faults in FPVAs with multiple ports. Moreover, the proposed method can be applied to generate test patterns for traditional flow-based biochips with predefined architectures. The simulation results demonstrate that defects in FPVAs can be detected reliably by a limited number of test patterns generated by the proposed method. For traditional biochips with predefined architectures, these patterns also exhibit an improved test efficiency. [ABSTRACT FROM AUTHOR]

Flow-based microfluidic biochips are one of the most promising platforms used in biochemical and pharmaceutical laboratories due to their high efficiency and low costs. Inside such a chip, fluids of nanoliter volumes are transported between devices for various operations, such as mixing and detection. The transportation channels and corresponding operation devices are controlled by microvalves driven by external pressure sources. Since assigning an independent pressure source to every microvalve would be impractical due to high costs and limited system dimensions, states of microvalves are switched by a control logic using time multiplexing. Existing control-logic designs, however, still switch only a single control channel per operation, leading to a low efficiency. In this article, we present the first automatic synthesis approach for a control logic that is able to switch multiple control channels simultaneously. Moreover, we propose the first fault-aware design in control logic by introducing backup control paths to maintain the correct function even when manufacturing defects occur. The construction of control logic is achieved by a highly efficient framework based on particle swarm optimization, Boolean logic simplification, grid routing, together with mixing multiplexing. The simulation results demonstrate that the proposed multichannel switching mechanism leads to fewer valve-switching times and lower total logic cost, while realizing fault tolerance for all control channels. [ABSTRACT FROM AUTHOR]

Paper-based digital microfluidic biochips (P-DMFBs) have recently emerged as a promising low-cost and fast-responsive platform for biochemical assays. In P-DMFBs, electrodes and control lines are printed on a piece of photograph paper using an inkjet printer and carbon nanotubes (CNTs) conductive ink. Compared with traditional digital microfluidic biochips (DMFBs), P-DMFBs enjoy significant advantages, such as faster in-place fabrication with printer and ink, lower costs, and better disposability. Since electrodes and CNT control lines are printed on the same side of this paper, a critical design challenge for P-DMFB is to prevent control interference between moving droplets and the voltages on CNT control lines. Control interference may result in unexpected droplet movements and thus incorrect assay outputs. To address this design challenge, a control-fluidic codesign methodology is proposed in this paper, along with two demonstrative design flows integrating both fluidic design and control design, i.e., the droplet-oriented codesign flow and the electrode-oriented codesign flow. The droplet-oriented flow is suitable for designing biochips with sparse electrodes and relatively larger number of droplets, whereas the electrode-oriented flow is suitable for biochips with dense electrodes and smaller number of droplets. The computational simulation results of real-life bioassays demonstrate the effectiveness of the proposed codesign flows. [ABSTRACT FROM AUTHOR]

Continuous-flow microfluidic large-scale integration (mLSI) shows increasing importance in biological/chemical fields, thanks to its advantages in miniaturization and high throughput. Current mLSI is designed manually, which is time-consuming and error-prone. In recent years, design automation research for mLSI has evolved rapidly, aiming to replace manual labor by computers. However, previous design automation approaches used to design each microfluidic layer separately and over-simplify the layer interactions to various degrees, which resulted in a gap between realistic requirements and automatically generated designs. In this paper, we propose a module model library to accurately model microfluidic components involving layer interactions; and we propose a co-layout synthesis tool, Columba, which generates AutoCAD-compatible designs that fulfill all designs rules and can be directly used for mask fabrication. Columba takes plain-text netlist descriptions as inputs, and performs simultaneous placement and routing for multiple layers while ensuring the planarity of each layer. We validate Columba by fabricating two of its output designs. Columba is the first design automation tool that can seamlessly synchronize with the manufacturing flow. [ABSTRACT FROM AUTHOR]

In flow-based biochips, peristaltic pumps consisting of valves are essential to generate circulation flow in a mixer. When a peristaltic pump is activated, the related valves for peristalsis are required to be actuated for many times. However, the roles of valves in traditional chips are fixed, and therefore the valves for peristalsis can wear out much faster than the valves for guiding fluid transportation. This could lead to a reduced lifetime of the chip, because the whole chip function can be affected when just a few or even only a single valve wears out. In this paper, we propose a valve-centered architecture with virtual valves, based on which we introduce a valve-role-changing concept to balance the valve actuations. By switching a valve into different roles, microfluidic components such as mixers, storages, and flow channels can be formed dynamically during the assay process, which enables us to balance the utilization of valves, and synthesize designs that support various kinds of operations. Compared with our preliminary work, we further decrease the largest number of valve actuation as well as the number of valves by the revised dynamic device mapping and fluid path routing. For dynamic device mapping, we introduce a virtual-boundary concept to generate devices at better places while connections between devices are still guaranteed. For fluid path routing, we accurately model valve actuation resulting from our valve-actuation-aware routing, and revise the results by rip-up and reroute. In addition to performance, we improve the reliability of our method by assuring fluid paths from devices to chip boundaries. Experiments show that the new method can be eight times better than the traditional method, and outperforms our preliminary work for large cases even with fewer valves. [ABSTRACT FROM PUBLISHER]