Search

The programming of partial polarization in ferroelectric (FE) hafnium zirconate (HZO) capacitors is shown to depend on the delay between FE reset and the polarization write pulse (delay-before-write), revealing a subtle history dependence. Programming is substantially independent of delays inserted after the write and before the read (delay-before-read), with no decay in partial polarization observed from 1~μs up to 260 ms. We further show that nonsaturation in FE polarization can be introduced if the pulse protocol is not strictly symmetric, where strictly symmetric means that the integral of the voltage waveform over a single measurement cycle is zero. The delay-before-write dependence in HZO is compared with lead-zirconium-titanate (PZT) capacitors used in FE random access memory (FRAM) which shows much weaker dependence. The delay dependence is attributed to the dynamics of subcritical nuclei formation in nucleation limited switching. For the first time, the decay of subcritical nuclei in HZO is shown to be observable up to 1 s, and an upper bound on their volume is estimated to be ~10 nm3, corresponding to ~ 4 × 4 × 4 unit cells. [ABSTRACT FROM AUTHOR]

Ferroelectric (FE) materials are being studied for a variety of applications in memory, logic, and neuromorphic computing, for which predictive models of FE polarization are essential. In this paper, we present a Monte Carlo simulation framework capable of predicting the dynamic, history-dependent response of an FE under arbitrary input waveforms. The simulation is developed by generalizing the physics-based nucleation-limited switching model for polarization reversal in a polycrystalline FE. Measured polarization reversal data from fabricated FE Hf0.5Zr0.5O2 capacitors are used to extract the statistical distribution of FE grains. After parameter extraction, the model is able to predict the dynamics of the FE capacitor without further calibration. Finally, the model is applied to characterize the dynamic response of FE–dielectric bilayer structures and quantify the reduction in memory window due to device variability. [ABSTRACT FROM AUTHOR]