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2. RRAM Crossbar Array With Cell Selection Device: A Device and Circuit Interaction Study.
- Author
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Deng, Yexin, Huang, Peng, Chen, Bing, Yang, Xiaolin, Gao, Bin, Wang, Juncheng, Zeng, Lang, Du, Gang, Kang, Jinfeng, and Liu, Xiaoyan
- Subjects
NONVOLATILE random-access memory ,CROSSBAR switches (Electronics) ,NONLINEAR theories ,MICROPROCESSORS ,COMPUTER simulation ,ELECTRIC power consumption ,ELECTRIC potential - Abstract
The resistive random access memory (RRAM) crossbar array has been extensively studied as one of the most promising candidates for future high-density nonvolatile memory technology. However, some problems caused by circuit and device interaction, such as sneak leakage paths, result in limited array size and large power consumption, which degrade the array performance significantly. Thus, the analysis on circuit and device interaction issue is imperative. In this paper, a simulation method is developed to investigate the critical issues correlated with the interaction between devices and the circuit. The simulations show that a large off/on ratio of resistance states of RRAM is beneficial for large readout margin (i.e., array size). The existence of the selector connected in series with an RRAM device can eliminate the need for high Ron resistance, which is critical for the array consisted of only RRAM cells. The readout margin is more sensitive to the variation of Ron and is determined by the nonlinearity of the I–V characteristics of RRAM, whereas the nonlinear characteristics of the selector device are beneficial for a larger readout margin. An optimal design scheme for turn-on voltage and conductance of the selector is proposed based on the simulation. [ABSTRACT FROM PUBLISHER]
- Published
- 2013
- Full Text
- View/download PDF
3. Two-Step Read Scheme in One-Selector and One-RRAM Crossbar-Based Neural Network for Improved Inference Robustness.
- Author
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Woo, Jiyong and Yu, Shimeng
- Subjects
NONVOLATILE random-access memory ,ARTIFICIAL neural networks ,CROSSBAR switches (Electronics) ,ELECTRIC admittance ,ROBUST control - Abstract
Introducing a threshold switching selector in a resistive random access memory (RRAM) is essential for implementing a crossbar array that accurately accelerates neuromorphic computations. But, at an expense, a read voltage (${V}_{\text {read}}$) to be used for inference tasks is inevitably boosted. Therefore, this brief shows the effect of the enlarged ${V}_{\text {read}}$ on the stability of conductance states of the RRAM relevant to the inference robustness. The multiple conductance states of the analog RRAM achieved by a SPICE simulation are stable under consecutive 106 cycles of nominal ${V}_{\text {read}}$. However, each state of the one selector and one RRAM begins to be disturbed at ~104 cycles due to the boosted ${V}_{\text {read}}$. More importantly, when a certain state exceeds to the next state due to the accumulated ${V}_{\text {read}}$ stress, a classification accuracy of the neural network is significantly degraded. We, thus, introduce a two-step read scheme that separates the roles of turning on the selector and reading the states. As the selector is turned on rapidly with an additional large pulse, the following ${V}_{\text {read}}$ can be lowered. As a result, the read disturbance is minimized, and the optimized two-step pulse scheme allows 106 MNIST images to be recognized with >95% accuracy in the neural network. [ABSTRACT FROM AUTHOR]
- Published
- 2018
- Full Text
- View/download PDF
4. Crossbar RRAM Arrays: Selector Device Requirements During Write Operation.
- Author
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Kim, Sungho, Zhou, Jiantao, and Lu, Wei D.
- Subjects
NONVOLATILE random-access memory ,CROSSBAR switches (Electronics) ,ELECTRIC potential ,ELECTRIC power consumption ,STRAY currents - Abstract
A comprehensive analysis of write operations (SET and RESET) in a resistance-change memory (resistive random access memory) crossbar array is carried out. Three types of resistive switching memory cells-nonlinear, rectifying-SET, and rectifying-RESET-are compared with each other in terms of voltage delivery, current delivery, and power consumption. Two different write schemes, V/2 and V/3, were considered, and the V/2 write scheme is preferred due to much lower power consumption. A simple numerical method was developed that simulates entire current flows and node voltages within a crossbar array and provides a quantitative tool for the accurate analysis of crossbar arrays and guidelines for developing reliable write operation. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
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