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This paper utilizes electrical analyses and a study of physical mechanisms to investigate metal gate structure-dependent performance in amorphous InGaZnO (a-IGZO) thin-film transistors. The effects of different shielding areas between the IGZO layer and metal gate are investigated. In devices with shorter metal gate lengths, an abnormal rise in capacitanceat the off-state in capacitance--voltage ( C-V) characteristic curves can be observed. This can be attributed to the stronger electric field induced by the edge of themetal gate under bias sweepwhen themetal gate length is shorter than the IGZO layer length. Light illumination measurements indicate a negative shift in threshold voltage and an increase in subthreshold-leakage current regardless of relative metal gate length. Moreover, negative threshold voltage shift becomes more severe with a more obvious hump in C-V characteristic curves under backlight illumination of a shorter width device, a phenomenon which has been verified by simulation. [ABSTRACT FROM AUTHOR]

The effect of a copper-embedded barrel on the performance of a helix slow-wave structure (SWS) has been studied theoretically and experimentally. The heat dissipation capability and cold-test characteristics of the SWSs with a monel barrel, a normal copper barrel, and a copper-embedded monel barrel have been analyzed and compared. With its combination of high mechanical strength and good thermal conductivity, the copper-embedded monel barrel enables better heat dissipation capability than the other barrel types and has low RF losses. [ABSTRACT FROM AUTHOR]

The effect of the plated metal film on the heat dissipation capability and cold-test characteristics of the helix slow-wave structure (SWS) have been studied in several experimental tests and computer simulations. The thermal conduction and the power losses of the helix SWS were improved by using a plated helix. A brazed SWS with end-plated rods exhibits excellent heat dissipation capability. The side-plated rods affect the cold-test characteristics of the SWS. [ABSTRACT FROM AUTHOR]

A novel and effective analytical method using ANSYS has been developed for studying the heat-dissipation capability of a helix traveling-wave-tube slow-wave structure (SWS). This method, which is based on calibrating theoretical calculations with experimental data, is able to precisely predict the SWS heat dissipation, thereby reducing material costs and saving time. The consistency and feasibility of this method have been verified by experimental tests on SWSs using copper-plated helices and both BeO and BN support rods. [ABSTRACT FROM AUTHOR]

A new experimental evaluation method is presented for evaluating and comparing the heat dissipation capability of the slow-wave structures (SWSs) of helix traveling-wave tube (TWT). The practicality and simplicity of the evaluation method have been validated through experimental tests in some components with different assembling and processing methods, such as the cold stuffing, the heat shrink, the hot insertion, the molybdenum wrapping methods, and so on. Experimental results demonstrate that our evaluation method can be used effectively and conveniently to estimate and compare the thermal dissipation capability of the SWSs of the helix TWT. [ABSTRACT FROM AUTHOR]

Active devices, including electrostatic discharge protection devices and ring-oscillator Circuits, under CMOS I/O pads are investigated in a 130 nm full eight-level copper metal complementary metal-oxide-semiconductor process, using fluorinated silicate glass (FSG) low-k inter-metal dielectric. The high current I-V curve measured in the second breakdown trigger point ( V[sub t2], I[sub t2] ) of ESD protection devices under various metal level stack structures, shows that i) I[sub t2] depends very weakly on the number of metal levels used, as expected given specific junction power dissipation criteria; and ii) V[sub t2] increases with the number of metal level stacks of I/O pads because of increased dynamic impedance due to the presence of more metal levels, as clarified by a simple RC model. Moreover, no noticeable degradation in the speed of the ring-oscillator circuit, as measured for a variety of test structures subjected to bonding mechanical stress, thermal stress by temperature cycling and dc electrical stress by transmission line pulse, as well as ac electrical stress by capacitive-coupling experiments. Accordingly, active devices under CMOS I/O pads is independent of bonding pad metal level structures. [ABSTRACT FROM AUTHOR]