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We present sub-30-nm In0.8Ga0.2As composite-channel high-electron-mobility transistors (HEMTs) with outstanding dc and high-frequency characteristics. We adopted a composite-channel design with an In0.8Ga0.2As core layer, which led to superior carrier transport properties such as a Hall mobility ( $\boldsymbol \mu _{n{\boldsymbol \_{}}\text {Hall}}$ ) of 13500 cm $^{{2}} \boldsymbol /\text{V}\cdot \text{s}$ . The device with ${L}_{g} \boldsymbol {=}\,\,19$ nm exhibited an excellent combination of dc and RF properties, including ${R}_{ \mathrm{\scriptscriptstyle ON}} \boldsymbol {=}\,\,271\Omega $ - $\boldsymbol \mu \text{m}$ , ${g}_{m{\boldsymbol \_{}}\text {max}} \boldsymbol {=}\,\,2.8$ mS ${\boldsymbol /} \boldsymbol \mu \text{m}$ , and ${f}_{\text {T}} \boldsymbol / {f}_{\text {max}} \boldsymbol {=}\,\,738\boldsymbol /492$ GHz. To understand the physical origin of such an excellent combination of dc and RF responses, we analyzed the effective mobility ( $\boldsymbol \mu _{n{\boldsymbol \_{}}\text {eff}}$ ) and delay time for both long- and short- ${L}_{g}$ devices, revealing a very high $\boldsymbol \mu _{n{\boldsymbol \_{}}\text {eff}}$ value of 13200 cm $^{{2}} \boldsymbol /\text{V}\cdot \text{s}$ and an average velocity under the gate ( ${v}_{\text {avg}}$ ) of $6.2\times 10^{{7}}$ cm $\boldsymbol /\text{s}$ . We also studied the impact of the electrostatic integrity of the device, finding that the intrinsic output conductance ( ${g}_{\text {oi}}$ ) played a role in determining ${f}_{\text {T}}$ and ${f}_{\text {max}}$ in short- ${L}_{g}$ HEMTs.

AlGaN/GaN FinMISHFETs with m-plane sidewall surface channel and various fin widths ( $\text{W}_{\textsf {fin}}$ ) were fabricated and characterized. The investigated devices have much higher current drivability due to the uniform and smooth surface of m-plane than those with the a-plane sidewall surface channel. The AlGaN/GaN FinMISHFETs with $\text{W}_{\textsf {fin}}$ smaller than 36 nm exhibit normally-off operation, high Ion/Ioff ratio of 108, and remarkable subthreshold swing (SS) smaller than 40 mV/decade in the wide current range of at least three orders. Combined with a positive threshold voltage, SS values smaller than 60 mV/decade in a wide current rage of at least three orders are among the world’s best subthreshold characteristics. Furthermore, when $\text{W}_{\textsf {fin}}$ is 31 nm, the off-state drain current is as low as 10–12 A. We show that this sharp switch is due to the simultaneous turn-on of the 2-D electron gas and the m-plane sidewall surface channel. The simulation results are carried out to show the gate-induced variation of the electron concentration within the fin structure, and the assumption of considering gate width as a function of gate bias is also developed to explain the reason for deep sub-60mV/decade in the demonstrated devices.

A correlation between reliability characteristics and failure mechanisms for time-dependent dielectric breakdown for a single ZrO 2 metal-insulator-metal capacitor has been studied. Frenkel-Poole emission was the dominant mechanism in the high electric field region. The extracted dynamic constant and trap energy level were 4.013 and 0.963 eV, respectively. The variation of α as a function of stress time under constant voltage stress (CVS) gradually decreased. Moreover, ΔC stress /C 0 under dynamic voltage stress was much greater than under CVS, which indicates that new defects and charge trapping could be generated in high-κ (HK) dielectric under dynamic voltage stress under negative voltage as well as positive voltage. The extracted average value of the Weibull slope (β) at 125°C was in the range 1.3-1.6. The average field acceleration parameter was ~8.67 cm/MV, and an effective dipole moment of bond breakage peff was ~29.73e A. The thermochemical model (E model) suggested that the oxygen vacancies induced by the dipolar energy contribution (p · Eloc) easily caused bond breakage in the HK dielectric. The energy required to form another V 0 was weakened to the bond strength of polar molecules. The characteristic breakdown strength (EBD) of ZrO 2 was 6.31 MV/cm, and the extracted activation energy AH 0 * was 1.874 eV when considering E model.

We have experimentally studied the scaling behavior of sub-100-nm InAs high-electron mobility transistors (HEMTs) on InP substrate from the logic operation point of view. These devices have been designed for scalability and combine a thin InAlAs barrier and a thin channel containing a pure InAs subchannel. InAs HEMTs with gate length down to 40 nm exhibit excellent logic figures of merit, such as ION/IOFF = 9 × 104, drain-induced-barrier lowering = 80 mV/V, S = 70 mV/dec, and an estimated logic gate delay of 0.6 ps at VDS = 0.5 V. In addition, we have obtained excellent high-frequency operation with Lg = 40 nm, such as fT = 491 GHz and fmax = 402 GHz at VDS = 0.5 V. In spite of the narrow bandgap of InAs subchannel, under the studied conditions, our devices are shown not to suffer from excessive band-to-band tunneling. When benchmarked against state-of-the-art Si devices, 40-nm InAs HEMTs exhibit ION = 0.6 A/μm at ILeak = 200 nA/μm. This is about two times higher ION than state-of-the-art high-performance 65-nm nMOSFET with comparable physical gate length and ILeak.

In this paper, we present a novel self-aligned process for future III-V logic FETs. Using this process, we have demonstrated enhancement-mode 90-nm-gate-length InGaAs HEMTs with excellent logic figures of merit. We have carried out a detailed analysis of this device architecture to determine its future scaling capabilities. We find that, as the insulator is scaled to achieve enhancement mode, the performance of the device is limited by degradation of the I ON/I OFF ratio due to gate leakage current. By use of TLM test structures, we have determined that the barrier resistance dominates the source resistance. We use a trilayer TLM model to predict the expected evolution of the contact resistance as it is scaled to realistic VLSI dimensions and find that the current technology results in resistance values that are two orders of magnitude higher than the desired target for sub-22-nm nodes. Using the model, we explore different options for device redesign. Both I ON/I OFF and source-resistance limitations imply that the use of a high-k gate dielectric will be required for future device implementations.

In this paper, we have experimentally investigated the impact of lateral and vertical scaling of In0.7Ga0.3As high-electron-mobility transistors (HEMTs) onto their logic performance. We have found that reducing the In0.52Al0.48As insulator thickness results in much better electrostatic integrity and improved short-channel behavior down to a gate length of around 60 nm. Our nearly enhancement-mode 60-nm HEMTs feature VT = -0.02 V, DIBL = 93 mV/V, S = 88 mV/V, and ION/IOFF = 1.6 times104, at V DD = 0.5 V. We also estimate a gate delay of CV/I = 1.6 ps at VDD = 0.5 V. We have benchmarked these devices against state-of-the-art Si CMOS. For the same leakage current, which includes the gate leakage current, the InGaAs HEMTs exhibit 1.2times more current drive (ION) than the state-of-the-art 65-nm low-power CMOS technology at V DD = 0.5 V.

We have experimentally studied the suitability of nanometer-scale In0.7Ga0.3As high-electron mobility transistors (HEMTs) as an n-channel device for a future high-speed and low-power logic technology for beyond-CMOS applications. To this end, we have fabricated 50- to 150-nm gate-length In0.7Ga0.3As HEMTs with different gate stack designs. This has allowed us to investigate the role of Schottky barrier height (PhiB) and insulator thickness (tins) on the logic characteristics of In0.7Ga0.3As HEMTs. The best 50-nm HEMTs with the highest PhiB and the smallest tins exhibit an ION/IOFF ratio in excess of 104 and a subthreshold slope (S) below 86 mV/dec. These nonoptimized 50-nm In0.7Ga0.3As HEMTs also show a logic gate delay (CV/I) of around 1 ps at a supply voltage of 0.5 V, while maintaining an ION/IOFF ratio above 104, which is comparable to state-of-the-art Si MOSFETs. As one of the alternatives for beyond-CMOS technologies, we believe that InAs-rich InGaAs HEMTs hold a considerable promise.