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An analytical surface potential model and 3-D ATLAS device simulations are used to investigate the impact of gate misalignment on the performance of dual-material double-gate (DMDG) silicon-on-insulator (SOI) n-MOSFET (metal-oxide-semiconductor field-effect transistor). Analytical and simulation results are consistent, which validates the proposed model for the DMDG SOI n-MOSFET.

TCAD simulations of the hot-carrier-reliability assessment of the gate electrode workfunction engineered recessed channel (GEWE-RC) MOSFET is carried out. The simulation results showed a reduction in the hot-carrier-reliability metrics, which suggests the feasibility of the GEWE-RC MOSFET design for high-performance application in which hot-carrier reliability plays an important role.

ATLAS-2D is used for studying the analog circuit performance metrics for the dual-material gate (DMG) MOSFETs. The analog performance can be improved by an increase in early voltage and a reduced output conductance from the DMG MOSFET design.

Gate-metal work-function engineering (dual-material-gate (DMG) design is introduced in order to increase the potential of the silicon-on-nothing (SON) MOSFETs for analog applications. The intrinsic gain in DMG DGS SON MOSFETs is improved due to increased gate control on the channel, thus providing design guidelines aiming at higher gain.

A simplified two-dimensional (2-D) analysis is described for metal-oxide semiconductor field-effect transistor (MOSFET) accounting the quantization of the inversion layer by using triangular potential well (TPW) approximation. The 2-D Poisson equation is solved by using Green's function approach and the results have proved their validity of the model.

A three-region Tri-Material Gate Stack (TRIMGAS) MOSFET structure which is made of three gate electrodes having different work functions is modeled. The model is capable of modeling the two-dimensional potential and electric field distribution for the single-material-gate (SMG), dual-material-gate (DMG) and straddle-gate structures, with and without the gate stack architecture.

A two-dimensional (2-D) analytical model of a dual material gate (DMG) epitaxial (Epi)-MOSFET for improved, SCEs, hot electron effects, and carrier transport efficiency is presented. The analytical model and simulation results indicate that the DMG Epi-MOSFET structure has better performance than the DMG MOSFET and SMG Epi-MOSFET.

The DMG-MOSFET structure has been analyzed its performance improvement over the conventional SMG-MOSFET is discussed. It is concluded that the results so obtained for the potential and the electric field for DMG-MOSFET are in good agreement with the simulated results.

This paper deals with the development of a generalized model describing the device electrostatic behavior of three different double gate n-type tunnel FET (TFET) architectures, i.e., dual material gate (DMG) TFET, heterodielectric (H-D) TFET, and dual material gate heterodielectric (DMG H-D). The model is advantageous in capturing the impact of dielectric and the metal gate length variation where a comparative study among these three aforementioned device architectures has been made in terms of various electrostatic parameters, such as surface potential, energy-band profile, and electric field, incorporating the impact of interface oxide charges. Subsequently, TCAD-based digital performance investigation for all these architectures has been performed where their capacitive behavior and the transient performance has been carefully analyzed and optimized by varying the metal work function ( M1 ) and length ( L1 ) value for both, i.e., the dielectric material and the metal gate. Both the modeling and simulation results reveal that the proposed architecture, i.e., DMG H-D TFET, outperforms the other two architectures, i.e., DMG and H-D TFET. [ABSTRACT FROM PUBLISHER]

In this paper, an analytical model of a four-gate dielectric modulated MOSFET for label-free electrical detection of the biomolecules has been proposed. To provide a binding site for the biomolecules, the channel region of MOSFET is left open in the four-gate configuration, which is conventionally covered by the gate electrode. As a result, the electrical characteristics of the device are affected by the neutral and charged biomolecules that binds to the underlap (open) channel region. The electrostatics is developed by solving a 2-D Poisson’s equation, assuming a parabolic potential profile along the channel direction using the conformal mapping technique and subsequently the drain current model is developed. The change in the threshold voltage is used as a sensing metric for the detection of biomolecules after their immobilization in the open region. The characteristic trends are supported and verified using the ATLAS device simulation software. [ABSTRACT FROM AUTHOR]

Part I of this paper dealt with the simulation study, using ATLAS 2D, of analog-circuit performance metrics for the dual-material-gate (DMG) silicon-on-nothing (SON) MOSFET. It was reported that, out of the several combinations in the DMG design studied, the DMG device with LM1 /L ratio as 1/2 amalga- mates the advantages of using a high metal work-function gate M1 and low metal work-function gate M2 in the most efficient manner. This paper focuses upon the effect of double-layer gate stack (DGS) (high.k/SiO2) on the single-material-gate (SMG) SON and the DMG SON MOSFETs. Improved Early voltage and reduced output conductance of the DMG SON MOSFETs are the driving forces behind the observed increase in intrinsic gain and fT-gain relationship for the DMG devices over SMG SON MOSFETs, with the DMG SON MOSFETs having LM1 /L ratio as 1/2, proving to be the best choice among various LM1/L ratios studied. A further improvement in intrinsic gain in DMG DGS SON MOSFETs comes about because of increased gate control on the channel, thus establishing design guidelines aiming at higher gain and better fT-gain relationship. [ABSTRACT FROM AUTHOR]