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The preliminary characterization of thin-film transistors (TFTs) based on a dispersion of ZnO nanorods in an n-type polymer semiconductor, [6, 6]-phenyl-[C.sub.61]-butyric acid methyl ester (PCBM), is reported. The results obtained showed a highly promising enhancement for high-performance solution-processable n-type OTFTs.

A novel parallel scheme for addressing voltage-programmed active-matrix organic light-emitting diode displays which provides high precision recovery of the threshold voltage shift is presented. This new pixel possesses circuit and the parallel addressing scheme can be adopted in large-area displays to improve the uniformity over the panel.

The fabrication and characterization of bottom-gate and top-gate nanocrystalline silicon (nc:Si:H) thin-film transistors (TFTs) with amorphous-silicon nitride (a-Si[N.sub.x]:H) as the gate dielectric is reported. The nc-Si:H TFTs have shown much better threshold-voltage ([V.sub.T]) stability when compared to amorphous-silicon (a-Si:H) counterparts, thereby offering great promise for applications in active-matrix organic light-emitting diode (AMOLED) displays.

An accelerated testing theory is developed for reducing the testing time of a-Si active matrix organic light-emitting diode (AMOLED) pixel circuits from tens of thousands of hours to around 4000-8000 hours. For voltage-programmed circuits, acceleration factors of eight are achievable, whereas acceleration factors of four are achievable for current programmed circuits.

An analytical model for the minimum pixel area, and hence the maximum resolution for both bottom and top emitting active matrix organic light-emitting-diode (AMOLED) architecture is presented in terms of the a-SI thin-film transistor (TFT) device parameters, the process design rules, and pixel circuit parameters. It is established that the lower device mobility of a-Si (TFT) is no longer the limiting factor.

The modeling and measurement of partition noise based on an improved technique for charge profile estimation in the transistor channel at any given time instant is presented. Partition noise generated during the transistor-reset operation is accurately determined and verified with measured data, using the predictions of charge profile.

The dynamic behavior of a 3-TFT current programmed pixel is examined and the impact of V(sub TH) shift on the organic light-emitting diode (OLED) drive current is analyzed. The pixel circuit was implemented in amorphous silicon technology and lifetime tests show an 11% current degradation at 700 h.

The effects of the deep-ultraviolet (DUV) laser radiation on sensitive charge-coupled device (CCD) image sensor characteristics and the mechanisms responsible for DUV laser damage in CCDs, were studied. Variations in extrinsic quantum efficiency (QE) at 157 nm and a dramatic increase in dark current density as a function of UV exposure dose are found when thinned front-illuminated linear CCD sensors are subjected to F2 excimer laser irradiation.

Self-compensating current mirror-based pixel circuits were demonstrated and the basic stability issues and the impact of thin film transistor bias nonidealities were analyzed to provide a deeper understanding of circuit operation. The main aim was to address the issue of the gradual rise in the organic light-emitting diode (OLED) drive current that is observed in the circuit with the help of three mechanisms.

Research involving above-threshold parameter extraction and modeling for amorphous silicon thin-film transistors is described and discussed.

The effect of the top gate on the static characteristics of dual-gate hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFT) is investigated and reported.

Researchers are investigating designs to improve their poor ultraviolet(UV) responsivity, since charge- coupled devices (CCDs) and digital image cameras were first integrated into manufacturing applications. An inorganic phosphor coating to convert the UV radiation to visible is developed.

An integrated pixel amplifier circuit using a-Si thin-film transistors (TFTs) based on the CMOS active pixel sensor (APS) technology is described. An excellent small-signal linearity and a high, programmable charge gain are reported.

The mechanism underlying the reverse characteristics of a-Si:H thin-film transistors (TFTs) based on experimental observations of test thin-film transistors (TFT) arrays that enable measurement of very small values of current have been examined. The three mechanisms identified as the source of the reverse current, ohmic conduction, front channel conduction, and back channel conduction, are mentioned.

A new model for studying the time-dependent reverse current variations in amorphous silicon Schottky diodes subjected to moderate biases has been developed. The time-dependence of the reverse current has a significant importance in the design and optimization of pixels for large-area imaging. The model has good fit with experimental data over an extended period of time, 1-10,000 seconds. Its parameters are reasonable for the fabrication process used.

Charge couple device (CCD) research has established a linear magnetic sensor array with MOS magnetic sensors. The device's optical magnetic sensor pixels, at 109.7%/Tesla [1.097%(10mT)], have much greater sensitivity than ordinary CMOS magnetic sensors. Its readout uses CCD technology. The use of buried-channel MOSFETs results in low-frequency noise. Magneto-CCD device parameters and characteristics are given.

Two offset models for a dual-drain metal oxide semiconductor field-effect transistor (MOSFET) are developed. The surface-channel and the buried-channel dual-drain MOSFET's can be used to acquire estimates of several MOS parameter variations. These models prove that, just like mobility variations, channel implant variations can contribute offset to magnetic sensor MOSFET's.

A new simulation technique evaluates steady state and transient electrothermal properties of IC-compatible thermally isolated microheaters. Two-dimensional partial differential equations express the heat and electrical transport properties of the device. The technique is based on the behavior of commercially-available circuit simulators such as HSPICE and enables the analysis of coupled, complex and nonlinear circuit elements. The simulation yields results consistent with experimental data.

Germanium fractions varying from zero to 30% with large doping levels are investigated to determine the mobility of drift holes in strained and unstrained SiGe alloys. Acoustic, optical alloy and ionized impurity scattering are involved in the determination of the mobility. The mobilities are also compared with the boron doping concentrations and perfect agreement is obtained by experimental and theoretical methods.

The revival of the Hall mobility in a single measurement is effected by the van der Pauw dual configuration, for which a geometric factor is derived. The derivation procedure is basically different from the small perturbation analytical method, and involves the numerical solution of the carrier continuity equation. Practical device geometries that are not constrained by photolithography limitations are also designed to measure the material and process.

An experimental study of the temperature's effect on the low-frequency noise performance of the dual-collector bipolar magnetotransistor is presented. It details the set-up used to obtain the temperature coefficient of magnetic field resolution at varying temperature and bias conditions. A discussion of measurement results, along with the simulation models developed from observed data, is also included.

A model was constructed for calculating electron drift mobility in SiGe. The model is based on the assumptions that the conduction bands of the unstrained alloys are Si-like for Ge fractions less than 30% and that the strain-induced energy shifts occur in the conduction band valleys of the strained alloys. Results show that the two detected unstrained mobilities experience degradation for doping levels of up to 10 to the seventeenth power cm-3.

In contrast to the conventional planar p-i-n photodiode and a metal-semiconductor-metal photodetector, the 3-D dual-gate photosensitive thin-film transistor (TFT) architectures presented here attain excellent photoresponse characteristics. Operating the device in the subthreshold regime further boosts the photoconductive gain as a result of light-induced decrease in the threshold voltage. This paper presents design considerations along with a performance comparison between 3-D photosensitive TFTs that have π- and FIN-shaped channels and conventional TFT with a planar channel. Our paper shows that the π-shaped structure tends to have a higher sensitivity while the FIN-shaped counterpart is more responsive with wider dynamic range. For both structures, a measured photoconductive gain of 104~106% is obtained with spectral responsivity ranging from near UV to near IR, and the photoresponse time in the range of tens of milliseconds. The 3-D dual-gate photosensitive TFT architecture appears to be very promising for large-area, low-level UV, visible, and IR detection applications. [ABSTRACT FROM AUTHOR]

Amorphous hydrogenated silicon thin-film transistors (TFTs) are critical components in large area display and sensor systems, and the need for TFT circuits has been increasing. However, the intrinsic metastability associated with the TFT leads to a threshold voltage shift (VT shift) with time, under prolonged gate bias. For design of reliable TFT circuits, it is imperative to accurately predict this instability for time-varying analog gate bias. In this paper, the author model the threshold voltage variation using a probabilistic analysis of the electron population dynamics as prescribed by the defect pool and charge trapping mechanisms. The model is then extended for prediction of the effect of variable gate bias, and in particular the device history, on the VT shift. Based on this model, a passive equivalent circuit is synthesized to accurately predict the VT shift in TFTs for applications in active matrix organic light emitting diode displays and sensors. [ABSTRACT FROM AUTHOR]

This paper presents modeling and parameter extraction of the above-threshold characteristics of hydrogenated amorphorous silicon (a-Si:H) thin-film transistors (TFTs) in both linear and saturation regions of operation. A bias- and geometry-independent definition for field effect mobility considering the ratio of free-to-trapped carriers is introduced, which conveys the properties of the active semiconducting layer. A method for extraction of model parameters such as threshold voltage, effective mobility, band-tail slope, and contact resistance from the measurement results is presented. This not only provides insight to the device properties, which are highly fabrication-dependent, but also enables accurate and reliable TFT circuit simulation. The techniques presented here form the basis for extraction of physical parameters for other TFTs with similar gap properties, such as organic and polymer TFTs. [ABSTRACT FROM AUTHOR]

Investigates the reverse current-voltage characteristics of inverted staggered hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFT). Circuit schematic of a conventional pixel in a-Si:H imaging arrays; Thicknesses of the different layers of the TFT; Development of modeling equations for leakage mechanisms.

The article presents a correction to the paper "Zinc Oxide Nanostructures and High Electron Mobility Nanocomposite Thin Film Transistors," by Flora M. Li, Gen-Wen Hsieh, Sharvari Dalal, et al., from the November 2008 issue.