Search

In this paper, we study and compare Si versus Ge pMOS FinFETs at advanced node dimensions using ensemble Monte Carlo simulations. It is found that due to large external resistance, lack of stressing methods, smaller bandgap, larger dielectric constant, and increased variability that in the absence of major innovation, Ge is not an ideal candidate for channel replacement material of pMOS in future CMOS technology generation FinFETs. In order for Ge to compete with Si, it would at a minimum require a stressing mechanism and improved contact resistance, but leakage and variability would still be a concern for low-power applications. [ABSTRACT FROM AUTHOR]

We present a comprehensive study of hole transport in germanium layers on “virtual” substrates using a full band Monte Carlo simulation approach, considering alternate “virtual” substrate and channel orientations and including the impact of the corresponding biaxial strain, doping, and lattice temperature. The superior mobility in strained germanium channels with \langle\bar\1 \10\rangle orientation on a (110) “virtual” substrate is confirmed, and the factors leading to this enhancement are evaluated. The significant decrease in strain-and-orientation-induced mobility enhancement due to impurity scattering in doped material and at increasing lattice temperature is also demonstrated. Both factors determine how efficiently the mobility enhancement translates into transistor performance enhancement. Additionally, we shine light on the question of which factor has stronger impact in mediating the increase in mobility due to strain—the breaking of degeneracy for the heavy- and light-hole bands at the \Gamma point or the reduction in the density of states. [ABSTRACT FROM PUBLISHER]

Quantum corrections based on density gradient formalism, recently introduced in the 3-D Monte Carlo (MC) module of the Glasgow “atomistic” simulator, are used to simultaneously capture quantum confinement effects as well as “ab initio” ionized impurity scattering. This has allowed us to consistently study the impact of transport variability due to scattering from random discrete dopants on the on-current variability in realistic nano-CMOS transistors. Such simulations result in an increased drain current variability when compared with the drift diffusion (DD) simulation. For the first time, a method that is used to accurately transfer the increased on-current variability obtained from the “ ab initio” MC simulations to the DD simulations is subsequently presented. The MC-corrected DD simulations are used to produce the target I–V characteristics from which the statistical compact models are extracted for use in preliminary design kits at the early stage of new technology development. [ABSTRACT FROM PUBLISHER]