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The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

Single-phase power factor correction (PFC) ac–dc converters are widely used in the industry for ac–dc power conversion from single phase ac-mains to an isolated output dc voltage. Typically, for high-power applications, such converters use an ac–dc boost input converter followed by a dc–dc full-bridge converter. A new ac–dc single-stage high-power universal PFC ac input full-bridge, pulse-width modulated converter is proposed in this paper. The converter can operate with an excellent input power factor, continuous input and output currents, and a non-excessive intermediate dc bus voltage and has reduced number of semiconductor devices thus presenting a cost-effective novel solution for such applications. In this paper, the operation of the proposed converter is explained, a steady-state analysis of its operation is performed, and the results of the analysis are used to develop a procedure for its design. The operation of the proposed converter is confirmed with results obtained from an experimental prototype. [ABSTRACT FROM PUBLISHER]

Three-level active neutral-point-clamped (NPC) (ANPC) (3L-ANPC) voltage-source converters (3L-ANPC VSCs) offer three additional switch states and an increase of commutations by a factor of four, compared to the three-level NPC voltage-source converter. This paper presents, for the first time, a detailed analysis of all 3L-ANPC VSC commutations using high-power 5SHY55L4500 integrated gate-commutated thyristors. Starting with a description of the switching states and commutations, a new 3-kV 5-kA medium-voltage 3L-ANPC testbench is described. To verify the function of all commutations, this paper derives suitable switching sequences and analyzes the commutations and switching transients in detail for dc-link voltages of 2.13–2.43 kV and load currents of 3.95–4.36 kA. The experimental investigations show that, although the ANPC commutations substantially differ from NPC commutations, the ANPC commutations do not present critical operating conditions for the power semiconductors or the converters. Thus, all 32 ANPC commutations can be applied in a new medium-voltage converter realization. [ABSTRACT FROM PUBLISHER]

The main objective of this paper is to examine the operation of a fundamental buck-based three-phase single-stage ac–dc full-bridge converter. In this paper, the operation of this fundamental converter is explained and analyzed, and a procedure for the design of its key components is derived and demonstrated with an example. The performance and characteristics of the converter are shown with experimental results that have been obtained from a prototype, and general concluding remarks comparing buck-based and boost-based three-phase single-stage ac–dc full-bridge converters are made. [ABSTRACT FROM PUBLISHER]

This paper presents a modulation strategy for the modular multilevel converter (MMC) which provides the voltage balancing of the capacitors of different submodules comprising the converter. Not only is this modulation applicable to MMCs constructed with classic two level (2L) submodules, but it is also effective for arrangements with different submodule concepts, for instance, topologies like neutral point clamped (NPC), flying capacitors (FCs), neutral point piloted (NPP), etc. Therefore, firstly, the general modulation philosophy is explained applied to the two level (2L) submodule concept, and secondly, the extension to 3L-NPC and 3L-FC submodule topologies is analyzed. After that, the validation of the studied modulation strategy is carried out by means of successful simulation results, at different switching frequencies and number of submodules. The corresponding experimental results are shown in Part II of this paper after having implemented the aforementioned modulation strategy in a real test bench. In addition to this, a comparison based on thermal analysis and sizing of elements among the four studied submodule topologies is also included. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel current link topology with a diode rectifier and magnetic energy recovery switch (MERS) using a current source inverter for offshore-wind-farm application. Despite the use of a diode rectifier, the proposed topology is capable of regulating individual turbine torque partially. Because offshore wind condition is more stable and has less turbulence intensity (typically 0.08) than that of onshore wind, the individual full-range controllability realized typically by pulse-controlled converters is not necessary. Instead of them, the proposed scheme, a diode rectifier with MERS, has only partial controllability of the individual generator torque which is estimated to be sufficient to achieve the maximum power point tracking operation for offshore-wind-farm application. The proposed topology is aiming to be applicable for offshore wind farms where maintenance reduction is conclusively a critical issue because of the inaccessibility. In this paper, experimental results represent the effectiveness of the topology. Moreover, a new control strategy for offshore wind farms with the proposed topology is also proposed. [ABSTRACT FROM PUBLISHER]

Many different topologies based on the multilevel converter approach have been presented in the last decades. In order to obtain improved output waveforms, several modulation techniques have been developed for such converters. Some of those modulation schemes can be directly applied to almost any multilevel converter, while others require significant adaptation in order to be implemented in certain specific converters. This paper presents the implementation of a phase-disposition level-shifted pulsewidth modulation to the recently introduced hybrid multicell converter (HMC). The HMC uses a flying capacitor module on each cell to generate a positive variable dc-link voltage. The variable dc link is inverted at fundamental switching frequency by an H-bridge to generate the cell output voltage. It is desirable to use PD-PWM for its well-known high-performance waveforms. In this paper, a state-machine decoder is developed to balance the floating capacitor voltages and to equalize the supplied power for the series-connected cells of the HMC when using a PD-PWM pattern. Experimental results obtained from a 10-kW prototype are presented, confirming the good-quality waveforms of the HMC modulated with PD-PWM and the adequate balance of all floating capacitors. [ABSTRACT FROM PUBLISHER]

In this paper, an immune algorithm (IA) is developed for optimization of the harmonic performance of a three-phase inverter under the space-vector pulsewidth-modulation (SVPWM) control strategy. The presented algorithm employs the immune approach as the search method for finding the best optimal control vectors and action time of the three-phase inverter. As a result, the optimal control vectors and action time are calculated to minimize the objective function of the weighted total harmonic distortion of the output voltage waveforms. In addition, an experimental platform based on DSP and field-programmable gate array is built. This paper provides a detailed performance analysis of the method with comparison to the conventional SVPWM. The simulation and experimental results verify the superiority of the best control sequences generated by IA compared with the existing conventional control strategies. [ABSTRACT FROM PUBLISHER]

A new pulse width modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is developed and presented in this paper. The proposed PWM scheme not only takes advantage of the special properties available in NPC inverters, but also reduces the switching loss of the inverter along with an inherent neutral point (NP) voltage control. Based on a circuit-level decoupling concept, the NPC inverter can be decoupled into two three-level Buck converters in every defined operating section, and thereby the controller design can be simplified. The salient features of the proposed scheme, as compared with the existing carrier-based DPWM strategies, are: 1) its reduced computational processing time, 2) its capability to balance the dc-link voltage without any additional control, and 3) its reduced complexity, e.g., only one carrier wave needed for pulse width modulating. Same as a space-vector modulation, the maximum modulation index, 1.1547, can be attainable by the proposed scheme. Moreover, compared to conventional continuous sinusoidal PWM, using this technique proposed here, the switching losses of the devices can be reduced by one third. In order to explain the operation of this topology properly, the decoupling principle including the driving signal synthesis and the NP potential variation are analyzed in detail in this paper. Finally, the viability and performance of the proposed modulation scheme are shown through simulation and experimental results in a laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a space vector pulsewidth modulation (PWM) (SVPWM) algorithm is proposed, which is in \alpha^\prime\beta^\prime frame with dc-link capacitor voltage equalization for diode-clamped multilevel converters (DCMCs). The \alpha^\prime\beta^\prime frame is a coordinate system similar to the \alpha\beta frame. In this frame, some original complex calculations are substituted by integer additions, integer subtractions, truncations, etc. It brings the time and area efficiency to fixed-point digital realization, particularly for the application in a field-programmable gate array. Meanwhile, a minimum energy property of multiple dc-link capacitors is applied as the basic principle for voltage equalization based on a capacitor current prediction algorithm. By evaluating the redundant vectors in each pulse dwelling period, the balancing algorithm chooses an optimal vector, generates the optimal PWM signals, and sustains the voltage stability. After that, an arbitrary multilevel SVPWM intellectual property core is designed and analyzed in the \alpha^\prime\beta^\prime frame. At the end of this paper, a five-level DCMC-based static synchronous compensator is built and tested. The experimental results verify the balancing algorithm and the system steady-state and dynamic performances. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) is a newly emerging multilevel topology for high-voltage applications during recent years. In this paper, a new MMC is proposed, and the structure and operating principle are analyzed. Owing to the cascaded basic cells without multiwinding transformer, the voltage balancing of floating capacitors must be considered. However, the voltage fluctuation also exists, and theoretical analysis indicates that the amplitude is inversely proportional to the fundamental frequency. This paper has proposed a voltage-fluctuation-suppression method which can reduce the amplitude of the voltage fluctuation in low-frequency region. It can also be used in motor driving with pump/blowerlike load at low frequency and improve the start-up performance significantly. A low-power three-phase five-level prototype is designed and built up to demonstrate the validity of this method. [ABSTRACT FROM PUBLISHER]

This paper discusses the implementation of level-shifted and phase-shifted carrier-based modulation methods, in conjunction with a multiphase open-end winding drive topology. The considered drive is supplied using two five-phase two-level voltage source inverters (VSIs), with input provided from two isolated supplies of equal dc voltages. The topology is known to yield the same space-vector pattern as a corresponding three-level inverter in single-sided supply mode. It is shown in this paper that, with the application of a simple logic, the same phase voltage waveforms result as those obtainable with the appropriate carrier-based modulation scheme applied to the three-level VSI in single-sided supply mode. While the outcomes of the modulation techniques are the same, the open-end winding topology offers certain advantages, such as modularity and absence of capacitor voltage balancing requirements. The analysis is conducted for selected modulation methods using voltage and current waveforms, spectra Fast Fourier Transform (FFT), and total harmonic distortion as figures of merit. Theoretical considerations are verified by means of simulation and experimental results. [ABSTRACT FROM PUBLISHER]

A new three-phase single-stage rectifier is proposed in this paper. The outstanding features of the proposed rectifier are that it can produce input currents that do not have deadband regions and an output current that can be continuous when the converter is operating from maximum load to at least half of the load. In this paper, the operation of the new converter is explained, its features and design are discussed in results, and its operation is confirmed with experimental results obtained from a prototype. [ABSTRACT FROM PUBLISHER]

This paper proposes a light-emitting diode (LED) driver based on a three-phase resonant switched capacitor (SC) converter. The LED lamp employs chip-on-board (COB) technology, as it is possible to achieve high power density. The three-phase structure provides low ripple current and reduced percent flicker. Besides, it does not use electrolytic capacitors, thus, causing the driver lifetime to increase. The converter active switches are turned off under zero current switching (ZCS) and zero voltage switching (ZVS) conditions, as efficiency is consequently increased. LED dimming is also a prominent advantage, what can be obtained by varying the switching frequency. An experimental prototype rated at 216 W has been developed in order to evaluate the performance of the proposed approach, while results are properly presented and discussed. LED dimming is possible as the output power varies from 50% to 100%. Overall efficiency and power factor are higher than 90% and 0.97 over the entire load range, respectively. [ABSTRACT FROM PUBLISHER]

During the design phase of a modular multilevel converter (MMC), an accurate loss evaluation of the submodule (SM) plays an important role. In this paper, a method based on the analytical description of the MMC key waveforms that allows to directly obtain the average semiconductor and capacitor losses that each SM will experience is introduced, under different operating conditions or control schemes. To verify the proposed concept, the results are compared with the losses obtained from a switched model with closed-loop control, where the analytical MMC key waveforms are approached in steady state. The proposed method provides a great flexibility and a significant reduction of the simulation/computational time otherwise needed to evaluate SM losses under various operating conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a new high-voltage pulse generator, which is based on positive and negative buck-boost (BB) converters fed from a relatively low voltage dc supply. The proposed generator is able to generate unipolar or bipolar high-voltage pulses via operating the BB converters with series or parallel connected outputs respectively using a common input dc source. The components of each converter are rated at half of the pulsed voltage magnitude in the unipolar mode. The converters in the proposed pulse generator operate in discontinuous conduction mode. This enhances system efficiency, as the circuit only operates when it is desired to generate a pulsed output voltage, otherwise the circuit is switched to idle mode with zero current. Detailed illustration of the proposed approach is presented along with a full design of the system components for given output pulse specifications. Finally, simulation and experimental results are presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for Z-source inverter based on switched Z-source network is proposed. The proposed switched Z-source inverter can provide high voltage gain in low duty cycles. The continuous input current is one of the other advantages of the proposed inverter. The performance of the proposed inverter is investigated in different operating modes and the voltage and current equations of all elements and equations of critical inductance are calculated. Furthermore, the power losses and efficiency analyses are presented. The comprehensive comparison between the proposed inverter and the other conventional Z-source inverters shows its excellent performance. Finally, to prove the correct operation of the proposed topology, the experimental and simulation results using PSCAD/EMTDC software are presented. [ABSTRACT FROM PUBLISHER]

Electrolytic capacitors are the components that mainly impact the lifetime of ac/dc light-emitting diode (LED) drivers. Therefore, eliminating electrolytic capacitors from LED drivers is of vital importance. First, the basic derivation concept of a family of flyback-based three-port converters for electrolytic capacitor-less LED drivers is addressed in this paper, by manipulating the power flow among input port, output port, and storage capacitors. Together with the derivation of existing topologies, new topologies are also proposed. After evaluation, an integrated dual flyback converter (IDFC) is chosen, which requires less switching components and simpler control strategy. Following that, the operation principle and switching modes of the IDFC are elaborated, as well as the parameter design and implementation of control strategy. Finally, experiments on a laboratory prototype are carried out to verify the feasibility of the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper presents a novel soft-switching galvanically isolated buck-boost dc–dc converter as a module-integrated converter for photovoltaic (PV) applications. It features three major operating modes: boost, normal, and buck mode. Their proper distribution over the input voltage range enables wide voltage regulation capabilities, i.e., close to those of nonisolated power optimizers. The proposed control algorithm requires only one buck-boost switching stage that performs voltage regulation by means of the switching stage reconfiguration with smooth transition between the modes. The design guidelines and the digital control system for PV applications are provided. The module-integrated converter was verified experimentally with a solar array simulator. The converter showed good maximum power point tracking performance and a peak efficiency of nearly 97%. [ABSTRACT FROM PUBLISHER]

This paper proposes a true zero voltage zero current switching (ZVZCS) nonisolated bidirectional dc–dc converter with reduced component count. An auxiliary resonant network—which comprises of an inductor, capacitor, diode, and two switches—provides the zero voltage switching transitions of the main switches at turn on and turn off instants. In addition, a pair of auxiliary inductors, which act as inductive snubbers, aids the zero current switching transitions. The proposed configuration is able to provide soft commutation for the main switches for a wide range of input voltage, switching frequency, and load current variations—thus significantly improving the efficiency profile over a wide operating window. Besides, the auxiliary switches are also soft commutated, while the reverse recovery loss induced by the high side diode is eliminated. The ZVZCS soft switching operation is demonstrated by a 150 W prototype converter; it is proven consistent with the waveforms derived from the theoretical analysis. Its performance is evaluated against the standard hard-switched boost, buck, and several other leading soft switching converters published in the recent literature. The maximum full load efficiency at 100 kHz is recorded at 98.2% and 97.5% in the boost and buck modes, respectively. [ABSTRACT FROM PUBLISHER]

This paper proposes a boost-integrated two-switch forward ac–dc light-emitting diode (LED) driver with a high power factor and ripple-free output inductor current. In the proposed LED driver, the maximum switch voltages are clamped to the voltage level of the dc-link capacitor without an RCD snubber circuit by adopting a two-switch forward structure, and the magnetizing inductor energy is restored in the dc-link capacitor to prevent the magnetizing inductor from saturating without a tertiary winding. Moreover, the relatively small capacitance can be utilized by the output capacitor, as the output inductor current ripple is significantly reduced by the additional circuit, unlike in the conventional LED driver. Hence, the LC filter at the output stage is simplified. The proposed LED driver has a high power factor and the power efficiency is improved. The theoretical analysis results of the proposed LED driver are verified on an output 24 [V]–1.4 [A] prototype. [ABSTRACT FROM PUBLISHER]

In order to reduce the cost and volume of small-medium power ac–dc light-emitting diode (LED) lighting systems, single-stage LED drivers are often used to drive LEDs with constant current. In this paper, a single-stage isolated high-power factor ac–dc LED driver is proposed and analyzed in detail, which is composed of a buck–boost power factor correction unit operating in discontinuous conduction mode and an isolated dc/dc unit with a voltage doubler rectifier, and the two units are integrated together by sharing the same power switch. Very high input power factor is achieved since the PFC unit operates with almost fixed duty ratio during half period of the utility line voltage. Since a voltage doubler rectifier is included in the isolated dc/dc unit, magnetic core size of the transformer and voltage stress of the secondary side diodes are reduced remarkably. First, the operating principle and performance of the LED driver are analyzed. Then, the main parameters are quantitatively calculated out in detail. Finally, a comparative analysis is presented and a 120 W experimental prototype with 1 A output current is built according to the calculated parameters and the experimental results are presented to verify the correctness of the theoretical analysis and parameter design. [ABSTRACT FROM PUBLISHER]

A microconverter serves as a front-end dc–dc stage of a microinverter to convert the power from a photovoltaic module to a dc bus. These front-end microconverters require isolation, high-boost ratio, wide-input voltage regulation, and high efficiency. This paper introduces an isolated resonant converter with hybrid modes of operation to achieve wide-input regulation while still maintaining high efficiency. The proposed converter is designed as a series resonant converter with nominal-input voltage and operates under two additional modes: a boost converter with low-input voltage and a buck converter with high-input voltage. Unlike conventional resonant converters, this converter operates at discontinues conduction mode with a fixed frequency, simplifying the design and control. In addition, this converter can achieve zero-voltage switching (ZVS) and/or zero-current switching (ZCS) of the primary-side MOSFETs, ZVS and/or ZCS of the secondary-side MOSFETs, and ZCS of output diodes under all operating conditions. Experimental results using a 300-W prototype achieve a peak efficiency of 98.1% and a California Energy Commission efficiency of 97.6% including all auxiliary and control power at nominal-input voltage. [ABSTRACT FROM PUBLISHER]

Insulated-gate bipolar transistor (IGBT) modules and dc-link capacitors are important parts in the majority of power electronic converters which contribute to cost, size, and failure rate on a considerable scale. This paper presents an online condition monitoring method for both IGBT modules and dc-link capacitors of power converters based on short-circuit current of an IGBT module, which is a good condition indicator according to the theory analysis. The failure prediction of dc-Link capacitor is realized by equivalent series resistance, which can be calculated by short-circuit current and a step voltage, and the bond wires fatigue can also be identified by the short-circuit current. The proposed method is capable for detecting small changes in the failure indicators of IGBT modules and electrolytic capacitors, and its effectiveness is validated by a confirmatory experiment. The novelty of the proposed method is that the degradations of IGBT modules and capacitors can be identified simultaneously, and has the merits of low cost and circuit simplicity [ABSTRACT FROM PUBLISHER]

In this paper, a new structure for high step-up dc–dc converters is proposed. In the proposed structure, it is possible to extend the topology by increasing the number of active–passive inductor cells. High voltage gain with lower duty cycle, low-current and -voltage stresses on switches, small inductors, and small size of filter are the main advantages of the proposed structure. The proposed converter is analyzed in different operating modes. In order to design the components’ values of the proposed converter, the equations of output voltage ripple are calculated in each operating mode and a design procedure is proposed based on the aforementioned equations. Moreover, the losses and efficiency of the converter are calculated. In order to validate the correctness of calculations and analyses, the experimental results are given. [ABSTRACT FROM PUBLISHER]

This paper presents a soft-switching dual-flyback dc–dc converter with improved efficiency and reduced output ripple current. Zero-voltage-switching (ZVS) technique and a dual-flyback module for reducing the number of snubber current paths are adopted to improve efficiency. For the ZVS technique, a self-driven synchronous rectifier (SR) is used instead of an output diode. By turning the self-driven SR off after a short delay, a main switch is turned on under the ZVS condition. For reducing the number of snubber current paths, a dual-flyback module and a snubber diode are used. When the main switch is turned off, leakage inductance energy is absorbed by a snubber diode into an input source and a primary dc-bus capacitor. Then, this energy is reprocessed by the dual-flyback dc-dc module to secondary side. Hence, there is only one snubber current path. In addition, the proposed converter features a reduced output ripple current because of the continuous current. Consequently, the proposed converter can achieve high efficiency and reduced output ripple current. To verify the performance of the proposed converter, operating principles, steady-state analyses, and experimental results from a 340 to 24-V, 100-W prototype are presented. [ABSTRACT FROM AUTHOR]

This paper presents a new active capacitor voltage balancing control method for the flying capacitor multicell (FCM) converters which is fully implemented using logic-form equations. The proposed active capacitor voltage balancing control technique, measures output current and flying capacitor (FC) voltages to generate the switching states in order to produce the required output voltage level and to balance FCs’ voltages at their reference values. Output voltage of the FCM converter controlled with proposed active capacitor voltage balancing method can be modulated with any pulse width modulation (PWM) technique such as the phase-shifted-carrier PWM or level-shifted-carrier PWM. An advantage of the proposed active capacitor voltage balancing control method is its simplicity as it does not require any complex computations and tedious optimization calculations. Simulation results and experimental measurements of a three-cell four-level and four-cell five-level FCM converters are presented to verify the performance of the proposed active capacitor voltage balancing control technique. [ABSTRACT FROM AUTHOR]

This paper proposes a novel active capacitor voltage balancing technique for stacked multicell (SM) converters. The proposed active capacitor voltage balancing control method detects the direction of the load current and measures the voltage of flying capacitors (FCs) to generate a proper switching state in order to form the required output voltage level and regulate the FC voltages at their desired reference levels. The proposed active capacitor voltage balancing control technique can modulate the output voltage through any of the pulse-width-modulation (PWM) techniques such as the phase-shifted carrier PWM or the level-shifted-carrier PWM. The foremost advantage of the proposed active control technique is that it does not demand any complex computations because it is not based on the optimization of the FC voltage-deviation cost functions. A thorough set of simulation results and experimental measurements for the five-level and seven-level SM converters are provided to validate the proposed active capacitor voltage balancing control method. [ABSTRACT FROM AUTHOR]

This paper proposes two nonisolated single-stage high power factor converters requiring low dc-link capacitance for power LEDs systems. Both converters result from the integration of the power factor correction and the LEDs driver stages, and require a relatively low dc-link capacitance value. A high power factor is demonstrated to be an inherent property of the proposed topologies and no input current control is necessary. The LEDs current is regulated by a symmetrical soft-switching half-bridge converter associated with a capacitive output filter. An accurate mathematical analysis valid for the two converters is detailed, yielding the elaboration of a step-by-step design procedure. In order to verify the analyses carried out, experimental results for two 90 W, 50 kHz, and 220 V converters are also presented. [ABSTRACT FROM PUBLISHER]

Low reliability is one of the major concerns of multilevel inverter due to the requirement of a large number of semiconductor devices as compared to two-level inverters. Thus, in this paper, a novel topology of multilevel inverter is proposed that can tolerate both open and short-circuit faults on its switches. The proposed topology also reduces dc sources and capacitors as compared to the conventional and recently proposed fault-tolerant topologies. Two types of solutions are provided in order to make the proposed topology fault tolerant; first provides a partial solution to fault, while the second provides a complete solution to fault. In addition, a novel switching strategy is proposed to reduce the amount of capacitor voltage ripples under normal and postfault conditions. Also, the proposed switching scheme offers an additional advantage of self-voltage balancing of its capacitor voltage both under normal as well as postfault conditions. To validate the proposed concepts, simulation and experimental analysis are carried out and different results are presented to show the viability of the proposed topology under normal operation, during fault and postfault conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a new cascade switch-ladder multilevel inverter topology is presented which can generate a large number of output voltage levels. First, a fundamental switch-ladder multilevel inverter structure is described. Then, the structure of recommended cascade topology based on series connection of fundamental switch-ladder topologies is presented. To generate maximum number of levels with minimum number of switching elements, dc sources, and voltage on switches, the proposed cascade topology is optimized. Comparison results prove that the presented cascade topology requires fewer numbers of components. Also, the value of voltage rating on switches is less than other structures. Experimental results for two topologies are analyzed to verify the performance of the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper proposes a unique carrier-based pulse width modulation strategy for a three-level neutral-point-clamped inverter that works satisfactorily and with uniform convergence time over the full power factor (PF) range of the load variation. It has excellent control over capacitor voltages and mitigates low-frequency oscillations in the neutral point for the full PF range. First, an investigation is made to see how the load currents get modulated to generate compensating neutral current causing charging and discharging of dc-link capacitors. It is observed that when an additional modulating voltage signal that is in phase with the corresponding phase current is added in each phase, a neutral current is produced in the right direction which can be used to compensate for any prior unbalance in capacitor voltages. It is demonstrated that the performance of this scheme is insensitive to the load PF variation (full range from zero to unity). It performs satisfactorily throughout the entire linear modulation range and eliminates any undesirable low-frequency harmonic component in the compensating neutral current. The effectiveness of the proposed scheme is verified through simulation and experimental results by varying load PF as well as modulation index with both passive and motor loads. [ABSTRACT FROM PUBLISHER]

The high number of power semiconductors in multilevel converters makes them susceptible to failure. Therefore, one of the main concerns in utilizing multilevel inverters is their reliability. This paper proposes a new simple fault-diagnosis and fault-handling method to increase the robustness and reliability of a flying capacitor multilevel inverter (FCMLI) which is one of the most prominent multilevel inverters. The proposed method is capable of diagnosing failed switch(es) and reconfiguring the switching sequence such that the output voltage is maintained similar to a normal operation condition. The proposed scheme identifies failed switch(es) by using the information about the charging state of the capacitors and the applied switching sequence. After identifying the failed switch(es), the algorithm bypasses the failed switch(es) and converts the control signals of the faulty leg from an M -cell L-level configuration to an (M-F)-cell L -level configuration (where F is the number of failed switches). The most attractive feature of the proposed control scheme is that any number of failed switches can be tolerated, as long as the number of functional switches is higher than the minimum number of cells required to build a full-binary L-level FCMLI. Simulation and experimental results are presented that verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

In this paper, the near-state pulse width modulation (NSPWM), adapted to be used in dual-voltage source inverter (VSI) fed open-end load, is introduced primarily aiming to appreciably minimize the voltage total harmonic distortion (THD). Within the framework of the proposed method, the active time of pulses at the second inverter is relatively adjusted within switching interval (compared to the first VSI). The phase voltage harmonics are formulated for dual-inverter modulated by NSPWM; then, optimal adjustment is identified via a three-dimensional curve of phase voltage THD versus modulation index (MI) and phase angle displacement (PAD). Due to the limitation of MI in NSPWM, the desired output voltage is synthesized with modifying not only MI but also PAD between references of two VSIs. Furthermore, NSPWM inherently takes advantage of better efficiency compared to conventional space vector modulation due to switching only two phases within an interval (by clamping one phase to positive/negative dc-rail). The dual-VSI supplied by two isolated dc sources is assembled in the laboratory to experimentally evaluate the THD reduction feature of the proposed method; also, the simulation results obtained by means of a MATLAB/Simulink environment show close agreement with experimental data. [ABSTRACT FROM PUBLISHER]

In this paper, a novel single-stage three-port inverter that connects photovoltaic (PV) panel to a single-phase power grid is introduced. In a single-phase grid-connected PV panel, the input power is constant during the line-frequency period, while the output power oscillates at double-line frequency. A series active power decoupling circuit utilizing thin-film capacitors is incorporated to a conventional flyback inverter to handle input and output power differences. Therefore, popularly low-reliable electrolytic capacitors are replaced with small long-lifetime thin film. The proposed inverter can extract the maximum power from PV, deliver a low total harmonic distortion sinusoidal current to the output, and decouple the input and output powers. The proposed power decoupling circuit shares the inverter main switch. Thus, these functions are achieved using just three switches and a simple control scheme which is applicable for both charging and discharging states. Operation principle and control strategy are discussed in detail. Experimental results based on a 100-W prototype inverter verify feasibility and functionality of the proposed inverter. [ABSTRACT FROM PUBLISHER]

This paper presents a new multicell topology based on flying capacitor (FC) structure suitable for multilevel converters. The proposed topology employs the concept of phase-shifted carrier pulse width modulation (PWM) with modified modulating signals to generate appropriate PWM signals. The modulation strategy along with all possible switching states are explained. The implementation of the proposed PWM technique is shown by the help of illustrating waveforms. To show the advantages of the proposed structure, different performance criteria are compared with other FC multicell (FCM) structures. Simulation results are used to further evaluate the potential merits of the proposed topology. It is shown that the proposed structure is superior to other FCM-based structures from different standpoints. Specifically, it reduces the number of high-frequency switches, the number of FCs, and at the same time improves the quality of output voltage. A laboratory-type experimental setup is used to validate the modulation strategy and other theoretical findings. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level inverter topology for an open-end induction motor drive requiring only eight switches per phase, using two three-level inverters with two isolated dc links in a 3:1 ratio. A space-vector-based formulation is used to determine pole voltages such that both inverters supply power to the load over the full modulation range, eliminating the possibility of dc bus overcharging. Proper selection of switching states ensures that all floating capacitor voltages are kept tightly balanced. A digital state machine is used to select sequences of switching states in order to eliminate deadtime-induced pole voltage transients, further improving the output-voltage quality. A level-shifted carrier-based pulse width modulation scheme is used. The steady-state and transient performance of this topology were verified and the experimental results are included. [ABSTRACT FROM AUTHOR]

A novel transformerless buck–boost dc–dc converter is proposed in this paper. The presented converter voltage gain is higher than that of the conventional boost, buck–boost, CUK, SEPIC, and ZETA converters, and high voltage can be obtained with a suitable duty cycle. In this converter, only one power switch is utilized. The voltage stress across the power switch is low. Hence, the low on-state resistance of the power switch can be selected to decrease conduction loss of the switch and improve efficiency. The presented converter has simple structure, therefore, the control of the proposed converter will be easy. The principle of operation and the mathematical analyses of the proposed converter are explained. The validity of the presented converter is verified by the experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a new family of hybrid Z-source boost dc–dc converters intended for photovoltaic applications, where the high step-up dc–dc converters are demanded to boost the low-source voltages to a predefined grid voltage. Because the boost capabilities of the traditional Z-source networks are limited, the proposed converters are composed of combine traditional Z-source networks in different ways to enhance the boost abilities of the traditional Z-source networks. The new version of the proposed Z-source converters is termed as hybrid Z-source boost dc–dc converters to satisfy the traditional benefits of Z-source networks with stronger voltage boost abilities which can also be applied to dc–ac, ac–ac, and ac–dc power conversions. The performances of the proposed converters are compared with other Z-source networks behaviors. The simulation and experimental results of the proposed converters are validated at different operating conditions. [ABSTRACT FROM PUBLISHER]

This paper proposes a new power conversion scheme for paralleled server power supplies. The snubber capacitor voltage is utilized for the secondary voltage source, from which bidirectional buck converter provides output power to the load under a very light-load condition. To increase the energy of the secondary voltage source, an additional voltage bus is connected between the snubber capacitors from each power supply. The main advantage of the proposed scheme is that high efficiency can be achieved especially under a very light-load condition because of the low switching and core loss achieved by using the buck converter instead of the conventional structure composed of a primary inverter, an isolation transformer, and a secondary rectifier. Furthermore, the buck converter is integrated into the secondary rectifier circuits, so additional components are minimized. The validity of the proposed converter is confirmed by the experimental results from two 12-V/750-W prototype modules. [ABSTRACT FROM PUBLISHER]

This paper proposes a power-factor-corrected bridgeless (BL) switched-mode power supply (SMPS) for welding applications that possesses output voltage control and current limiting feature even during extreme overloading conditions at the output terminals. Eliminating an input diode bridge rectifier minimizes conduction losses and improves thermal utilization of semiconductor devices. The front-end of the proposed SMPS consists of a BL boost converter operating in a continuous conduction mode to attain unity power factor, while at the rear end a pulse width modulation isolated full bridge dc–dc converter is used to regulate the output voltage. The design and implementation of this BL arc welding power supply (AWPS) is presented showing its fast dynamic response to supply voltage and load variations. The performance of the proposed AWPS is examined in terms of power factor, total harmonic distortion of the supply current, efficiency, and output current limit over a wide range of line/load variations. Test results confirm the effectiveness of the proposed AWPS in maintaining an impeccable power quality at utility interface apart from achieving an excellent output voltage regulation and current limiting capability. [ABSTRACT FROM PUBLISHER]

This paper presents a voltage-fed three-phase push–pull dc–dc converter. The main characteristics of the proposed converter are: small volume, low weight, reduced number of components, low voltage across the power semiconductors for duty cycles less than 1/3, and input current ripple cancellation when the duty cycle is equal to 1/3. Typical applications include battery chargers, electric vehicles, and renewable energy systems. The paper presents a theoretical analysis, design example, and experimental data for a 650 W, 150-125 VDC input, 75 VDC output, and 42 kHz switching frequency laboratory prototype. The measured performance agreed well with the theoretical predictions. The measured efficiency for 125 VDC input at full load is 95%. [ABSTRACT FROM PUBLISHER]

This paper presents an adaptive observer (AO)-based model predictive control (MPC) for a multilevel flying capacitors inverter (FCI). The proposed system consists of a midpoint dc-link three-cell four-level FCI feeding an RL load. Using the actual load current, the proposed AO estimates accurately the capacitors’ voltages, which are fed to the MPC algorithm by means of a hybrid model considering both discrete and continuous variables. For real-time constraints, sufficient conditions are given to guarantee the practical stability of the proposed AO-based MPC. Theoretical analysis and experimental results are given to show that the proposed method is stable for all system configurations and has good performances even during disturbances (load change, input change, and parameters variations). [ABSTRACT FROM AUTHOR]

A novel flying-capacitor-clamped five-level inverter based on bridge modular switched-capacitor topology is proposed in this paper. The inverter features the switched-capacitor circuit with dc–dc boosting conversion ability and the multilevel inverter circuit with flying-capacitor-clamped performance. With the special composite structure, the number of components is cut down compared to the topology of the conventional cascaded multilevel inverter. Meanwhile, part of switches can be operated under line voltage frequency, resulting in switching loss reduction. Hence, the potential of system efficiency and power density is released due to embed switched-capacitor circuit. More importantly, the optimized carrier-based phase disposition pulse width modulation method is employed as a control strategy. Under this control strategy, the capacitor voltage self-balance can be realized and quality of output waveforms can be improved significantly. After simulation, the prototype is built to validate the correctness and practicability of the analysis. [ABSTRACT FROM AUTHOR]

Considering the advantage of the modified stacked multicell converter over flying capacitor and stacked multicell converters, and noting that investigation of the conduction and switching power losses can be advantageous in the design of multilevel converters, an analytical approach to calculate and analyze conduction and switching power losses in modified stacked multicell converter is presented in this paper. First, rms and average currents flowing through the insulated-gate bipolar transistors (IGBTs) and antiparallel diodes are analytically calculated by considering the duty cycle of each IGBT and diode in terms of converter modulation index, load current, and power factor. For validation, numerical results of the derived closed-form equations for computation of the rms and average currents are compared with simulation results and experimental measurements. Numeric computations of the closed-form equations match the simulation results and experimental measurements very well, which verifies the analytic equations. Next, derived equations for rms and average currents computation are utilized to calculate the conduction power losses. Finally, switching power loss analysis is performed by numeric approach and curve fitting method. [ABSTRACT FROM AUTHOR]

Cascaded converters are adopted in many power systems to manage sources and loads at different voltage levels simultaneously. DC bus capacitor is one of the key components in these converters due to its energy storage and fast response capabilities. However, the ripple current through the capacitor will influence its lifetime and the overall efficiency of the converter. Previous studies showed that the capacitor current of ac systems is optimized when the duty cycles are synchronized under in phase or antiphase condition. In this paper, the bus capacitor ripple current of cascaded two-stage converters for dc systems with different combinations of duty cycles is analyzed. It is found that the optimum capacitor current ripple varies depending on the values of individual duty cycles and the phase-shift angle between them. By properly adjusting the phase shift, the capacitor RMS current value can be reduced without affecting the converter normal operation or the need for extra sensing circuits, hence improving the energy conversion efficiency and prolonging the capacitor lifetime with relatively simple implementation. To illustrate, a case study of a two-stage dc/dc converter is carried out. A laboratory prototype converter confirmed a maximum efficiency improvement of 2.8% if the phase shift is adjusted properly when compared to the same converter with the worst case phase-shift angle. [ABSTRACT FROM AUTHOR]

This paper presents a multilevel step-up dc/dc converter for dc-grid-based offshore wind energy conversion applications. The main features of the proposed multilevel converter are as follows: 1) the voltage stress of the power devices can be reduced, making it suitable for high-voltage applications; 2) the boost inductor can be reduced significantly, leading to the outstanding dynamic performance; and 3) high-voltage gain can be obtained and thus is well-suited for high-gain applications. Theoretical analysis was carried out for a four-level step-up converter, based on which, the converter can be extended to any arbitrary number of levels. The proposed four-level converter was verified by a simulation and evaluated by comparing with a conventional multilevel dc/dc converter in terms of the component stress and power device count. The developed topology was implemented on a 2-kW prototype converter to evaluate its feasibility. [ABSTRACT FROM AUTHOR]

The five-phase coupled-inductor inverter is a newly proposed option for three-level five-phase inverter drives. This paper comprehensively analyzes the inverter including the coupled-inductor current, current stress on the dc-link capacitors, and a comparison of these performance aspects using three pulse width modulation (PWM) strategies. Mathematical derivations of the inverter currents and the associated current stress reveal that the current stress is not only influenced by the choice of modulation strategy, as in the neutral-point-clamped topology, but also by the value of coupled inductance; furthermore, the choice of the modulation strategy impacts the core loss of the coupled inductors. Three carrier-based PWM methods are considered: sinusoidal PWM (SPWM), and two methods with the common-mode voltage reduction (referred to as CMVR1 and CMVR2) for the five-phase coupled-inductor inverter. CMVR2 is shown to be the best solution if common-mode voltage reduction is required. The analysis demonstrates that SPWM performs better with respect to current stress and inverter losses, therefore is the preferable modulating strategy for the five-phase coupled-inductor inverter if common-mode voltage reduction is not required. The analysis is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Multilevel active neutral-point-clamped (ANPC) converter is popularly known for its higher medium voltage drives up to 6.9 kV. However, common-mode voltages (CMV) are generated when using the well-established carrier-based pulse width modulation (PWM) modulation technique. As a result, CMV will become the major cause of the premature bearing failures and the conducted electromagnetic interferences. In this paper, a reduced CMV strategy is proposed for the ANPC which employs an alternatively new hybrid carrier-based modulation named as interleaved sawtooth carrier phase-disposition PWM (ISC-PD-PWM). By doing so, enhanced harmonic profile is achieved as compared to the typically used classical phase-shifted carrier PWM (PSC-PWM). Therefore, a comparative evaluation of the seven-level (7L) ANPC performance using the proposed reduced CMV approach is made between the novel hybrid ISC-PD-PWM and the conventional PSC-PWM in terms of harmonic analysis. The experimental results have proven the feasibility of the proposed concepts with the CMV effectively reduced. Such perceived merits make ANPC be more attractive for its motor drives. [ABSTRACT FROM AUTHOR]

This paper proposes a novel high step-up nonisolated single switch dc–dc converter suitable for regulating dc bus in various microsources especially for photovoltaic (PV) sources. Quadratic boost and switched-capacitor technique are used as primary and secondary circuits, respectively. A coupled inductor is applied to make a connection between them, so a high dc voltage gain is achieved. High efficiency is yield where voltage stress on active switch is alleviated by clamped capacitor; consequently, smaller \rmR\rm{DS(ON)} for power switch is required. On the other hand, input current of the proposed converter is continued, hence stress on the input source is reduced. The operating principles and steady-state analyses are discussed in detail for both continuous and discontinuous conduction modes. Also, the boundary condition is computed. To verify the performance of the proposed converter and theoretical calculations, a 250-W prototype converter is implemented with an input voltage of 24 V and an output voltage of 400 V designed especially for PV sources in continuous conduction mode operation. Finally, simulation results are confirmed by experimental results; maximum efficiency is occurred at 150 W and full-load efficiency is 92.96%. [ABSTRACT FROM AUTHOR]