Search

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

A novel complementary phase disposition pulsewidth modulation method for the modular multilevel converter (MMC) with a limited number of submodules is proposed in this paper. Compared with the previous works, more practical issues have been considered, and the corresponding solutions have been provided. First, a new preset PWM signal mapping sequence and an improved virtual loop mapping (VLM) are used in the modulation. This method not only achieves a favorable capacitor voltage balance in the symmetry system but lowers the switching frequency of MMC's devices. Second, to further reduce the switching frequency, the unbalance margin of capacitor voltages is adopted to achieve the switching between the VLM and the selective VLM (SVLM). Moreover, the system robustness has been improved by considering the situation of symmetry losing, like cell fails; in these cases, the capacitor voltages of the upper and lower arms are balanced through the collaboration of the SVLM and the reconfigurable VLM. Finally, the effectiveness of the proposed method has been verified with simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In this paper, a family of three-phase direct pulse-width modulated (PWM) ac–ac converters consisting of buck, boost, and buck–boost converters is proposed. The proposed converters have no commutation problem even if all of the switches are turned on or off simultaneously. They do not use lossy snubbers and do not sense the voltage polarity for commutation, and produce high-quality output voltage waveforms. The proposed converters allow the use of power MOSFETs and fast recovery freewheeling diodes independently. The use of power MOSFETs as active switches and freewheeling diodes with extremely fast recovery features lower the switching losses and enable us to reduce the volume of passive components by increasing switching frequency. The input (or output) filter inductor experiences twice of the converter switching frequency and thus can be designed with minimum size. To increase power density of the proposed converters, a three-phase three-limb coupled inductor is proposed. Three-phase coupled inductor integrates three separate coupled inductors of the proposed converters in one three-limb core. In comparison with separate coupled inductors, the three-phase coupled inductor has a smaller size with large current-handling capability. Experimental results obtained for the boost-type converter show the robustness of the proposed three-phase ac–ac converters. [ABSTRACT FROM AUTHOR]

The three-level boost power factor correction (PFC) converter has advantages of lower inductor current ripple and lower switch withstanding voltage compared with the boost PFC converter. Interleaved pulsewidth modulation had been used in the multiphase boost PFC converter. In the literature, interleaved current sensorless control (ICSC) for the multiphase boost PFC converters had been proposed. In this paper, the behavior of the three-level boost PFC converter is first analyzed. The results show that three-level converter has the same average equation as the interleaved boost PFC converter. Then, ICSC is modified for the three-level boost PFC converter with considering the voltage imbalance and the zero-crossing current distortion. The proposed modified ICSC (MICSC) is implemented in a field-programmable gate array board. Simulation results and experimental results are also provided to validate the proposed MICSC. [ABSTRACT FROM PUBLISHER]

This paper proposes a voltage balancing method for a flying capacitor multilevel converter based on the phase-disposition sinusoidal pulsewidth modulation (PD-SPWM). This voltage balancing method uses redundant switching states, which are determined by the minimization of a cost function. The implementation of the PD-SPWM using standard triangular carriers leads to additional switching events that are due to the transitions within the same voltage level, thus increasing the switching frequency of the power devices. Such drawback can be avoided by using sawtooth carrier waveforms. Another characteristic of the proposed voltage balancing method is that it does not require the tuning of parameters to achieve optimal performance. Simulation and experimental results confirm the robustness of the proposed method operating with different loads and transient conditions. [ABSTRACT FROM PUBLISHER]