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A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

The paper deals with some new results on the averaging theory approach for the analysis of feedback controlled pulsewidth modulation power electronic converters. It develops some considerations regarding the averaging approximation of time-variant differential systems proving an analytical relationship between the accuracy with which the solution of the averaged model converges to the solution of the original time-variant model (i.e., the switched model) and the switching frequency of the converters. This relation is valid both for stable and unstable systems. Moreover, this paper confirms, as corollary, that under suitable conditions (verified during the standard operations of the power electronic converters) the averaged model uniformly converges to the switched model. [ABSTRACT FROM AUTHOR]

This paper presents a sinusoidal pulsewidth modulation (SPWM) based direct digital control with average-voltage model (AVM) and division–summation process for paralleled three-phase three-wire (3φ3W) grid-connected converters to reduce circulating currents. With the direct digital control, plant of each single-phase converter can be derived directly, and a controller is then designed to cover the variation effects of filter inductance and grid voltage. Based on SPWM and AVM over a switching cycle, each 3φ3W converter can be decomposed into three single-phase converters and each converter is controlled individually to track its sinusoidal reference current tightly, reducing circulating currents significantly. Equal current sharing is therefore also achieved. The control laws for achieving grid connection are derived in detail. In the design and implementation, the inductances corresponding to various inductor currents are measured offline and stored in the controller for scheduling loop gain cycle by cycle. Experimental and simulated results from a three-converter system confirm the analysis and discussion of the proposed control approaches. [ABSTRACT FROM AUTHOR]

Multiphase variable-speed drives and generation systems (systems with more than three phases) have become one of the mainstream research areas during the last decade. The main driving forces are the specific applications, predominantly related to the green agenda, such as electric and hybrid electric vehicles (EVs), locomotive traction, ship propulsion, “more-electric” aircraft, remote offshore wind farms for electric energy generation, and general high-power industrial applications. As a result, produced body of significant work is substantial, making it impossible to review all the major developments in a single paper. This paper therefore surveys the recent progress in two specific areas associated with multiphase systems, namely power electronic supply control and innovative ways of using the additional degrees of freedom in multiphase machines for various nontraditional purposes. [ABSTRACT FROM AUTHOR]

Compensation of nonlinear effects generated by dead-time and semiconductors voltage drop has been widely studied in the literature about two-level converters. This paper takes a closer look at those analyses for multilevel converters, specifically for a cascaded H-bridge (CHB) converter modulated with phase-shifted pulse width modulation. The interaction between the cells is analyzed for a generic $n$ -cell converter, from which a general expression for the distortion generated by the nonlinearities has been obtained. Based on this expression, a compensation signal for the overall converter is calculated on each sample time, which is a fraction of the triangular carrier used to modulate each cell, thus significantly improving the quality of the output voltage signals. Experimental validation of the proposed compensation method is presented using a three-phase four-cell CHB converter prototype of 5.5 kW. [ABSTRACT FROM AUTHOR]

Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc–ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies. [ABSTRACT FROM AUTHOR]

Semiactive quadrupler rectifiers (SAQRs) are proposed in this paper to serve as the secondary rectification circuits, which make the secondary-side voltages to be controllable and help reduce current stress and conduction losses. An interleaved isolated boost converter is developed based on the proposed SAQRs. By utilizing the pulse-width modulation (PWM) plus phase-shift (PPS) control strategy, the primary- and secondary-side voltages are well matched to reduce the current values and circulating conduction losses. With the proposed SAQRs, the voltage gain is extended and the voltage stresses on power devices and passive components used in rectification circuits are reduced to the half of the high output voltage. Hence, the efficiency is improved by using a transformer with a smaller turns ratio and reduced parasitic parameters, and by employing low-voltage rating devices with better switching and conduction performance. With optimal design, lower voltage, and current stresses on the primary-side switches, minimized input current ripple can be realized. Moreover, the zero-voltage turn on switching of the active switches and the zero-current turn off switching of the diodes can be achieved over a wide load and voltage range by the proposed SAQR-based converter and the control strategy. Meanwhile, the higher voltage gain, the lower voltage, and the current stresses on power devices can be obtained with the proposed SAQR-based converter compared with passive quadrupler rectifier-based converter. The feasibility and effectiveness of the proposed SAQRs and the derived converter are verified by a 380-V output prototype. [ABSTRACT FROM PUBLISHER]

Interleaving of voltage-source converter (VSC) legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. However, the interleaved operation results in circulating currents between each phase converter legs as well as a zero-sequence circulating current (ZSCC), which become quite prominent when the converters operate with low switching frequencies. This paper demonstrates the interleaved operation of three-level converters under selective harmonic elimination pulsewidth modulation (SHE-PWM). A controller for the circulating current within the legs of each phase is also proposed. The controller is used in combination with optimally selected SHE-PWM patterns to generate the maximum number of voltage levels and minimize the peak value of the circulating current. Simulation and experimental results show the interleaved operation and the effect of SHE-PWM pattern selection in the overall system. [ABSTRACT FROM PUBLISHER]

This paper proposes an indirect matrix converter (IMC) topology to supply a five-phase load directly from three-phase ac power sources without bulky electrolytic capacitors and explains its operating principle. Using the emerging topology, which combines the five-leg inverter into the rectifier stage of the conventional IMC, the three-to-five-phase IMC topology reduces the number of power switches and results in a simpler commutation compared with the conventional three-to-five-phase direct matrix converter. In addition, a simple approach to realize the carrier-based pulsewidth modulation (CBPWM) method for a three-to-five-phase IMC is presented, and the proposed CBPWM method is analyzed based on the space-vector approach. As a result, the IMC with the proposed CBPWM method can be more easily implemented compared with IMCs with the space-vector PWM method. A three-to-five-phase IMC control platform is realized by coordinating a TMS320F28335 DSP (Texas Instruments) with an EPM7128SLC84-15 field-programmable gate array (Altera). The simulation and experimental results are provided to verify the effectiveness of the CBPWM strategy. [ABSTRACT FROM AUTHOR]

A novel complementary phase disposition pulsewidth modulation method for the modular multilevel converter (MMC) with a limited number of submodules is proposed in this paper. Compared with the previous works, more practical issues have been considered, and the corresponding solutions have been provided. First, a new preset PWM signal mapping sequence and an improved virtual loop mapping (VLM) are used in the modulation. This method not only achieves a favorable capacitor voltage balance in the symmetry system but lowers the switching frequency of MMC's devices. Second, to further reduce the switching frequency, the unbalance margin of capacitor voltages is adopted to achieve the switching between the VLM and the selective VLM (SVLM). Moreover, the system robustness has been improved by considering the situation of symmetry losing, like cell fails; in these cases, the capacitor voltages of the upper and lower arms are balanced through the collaboration of the SVLM and the reconfigurable VLM. Finally, the effectiveness of the proposed method has been verified with simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In this paper, a family of three-phase direct pulse-width modulated (PWM) ac–ac converters consisting of buck, boost, and buck–boost converters is proposed. The proposed converters have no commutation problem even if all of the switches are turned on or off simultaneously. They do not use lossy snubbers and do not sense the voltage polarity for commutation, and produce high-quality output voltage waveforms. The proposed converters allow the use of power MOSFETs and fast recovery freewheeling diodes independently. The use of power MOSFETs as active switches and freewheeling diodes with extremely fast recovery features lower the switching losses and enable us to reduce the volume of passive components by increasing switching frequency. The input (or output) filter inductor experiences twice of the converter switching frequency and thus can be designed with minimum size. To increase power density of the proposed converters, a three-phase three-limb coupled inductor is proposed. Three-phase coupled inductor integrates three separate coupled inductors of the proposed converters in one three-limb core. In comparison with separate coupled inductors, the three-phase coupled inductor has a smaller size with large current-handling capability. Experimental results obtained for the boost-type converter show the robustness of the proposed three-phase ac–ac converters. [ABSTRACT FROM AUTHOR]

This paper proposes a hybrid modulation strategy for asymmetrical cascaded multilevel converters operating under normal and faulty conditions on power cells. The proposed algorithm explores the advantages of both space vector (SV) and carrier-based modulation approaches. An SV is used for higher voltage cells to properly choose their voltage vectors in a way such as to avoid converter saturation, particularly under fault conditions. A generic algorithm to identify the domains of higher voltage vectors in which a reference lies, without the need for separation lines, is proposed. Then, to simplify the implementation of the algorithm, carrier-based modulation is employed for lower voltage cells, which switch with pulsewidth modulation. This suppresses the need for defining multiple switching sequences for different operational conditions, and it avoids converter saturation as much as possible, particularly under fault conditions on power cells. Simulation and experimental results for normal and faulty operational conditions are given, validating the theoretical analysis and demonstrating the good performance of the proposed hybrid modulation approach. [ABSTRACT FROM AUTHOR]

A novel CLL resonant converter with a semi-bridgeless active rectifier (S-BAR) is analyzed, and its hybrid control strategy is proposed in this paper. This topology is developed by replacing rectifier lower diodes with synchronous switches and regulation by a phase-shifted pulsewidth-modulation signal. Theoretical and simulation results show that the performance of the proposed S-BAR is appropriate for resonant converters and secondary-side controlled infrastructure requiring a wide voltage range control at the secondary side. The hybrid control algorithm is obtained with the phase-shift and frequency tuning considering the voltage at the load terminal. High efficiency can be maintained by this proposed control, reducing conduction losses and providing zero-voltage switching soft-switching condition with a wide output voltage range. To confirm the performance of the proposed converter, experimental results are provided for which the output voltage/current range from 0 to 80 V/0 to 8.75 A with an input of 120 V and an average efficiency value of 93%. [ABSTRACT FROM PUBLISHER]

The three-level boost power factor correction (PFC) converter has advantages of lower inductor current ripple and lower switch withstanding voltage compared with the boost PFC converter. Interleaved pulsewidth modulation had been used in the multiphase boost PFC converter. In the literature, interleaved current sensorless control (ICSC) for the multiphase boost PFC converters had been proposed. In this paper, the behavior of the three-level boost PFC converter is first analyzed. The results show that three-level converter has the same average equation as the interleaved boost PFC converter. Then, ICSC is modified for the three-level boost PFC converter with considering the voltage imbalance and the zero-crossing current distortion. The proposed modified ICSC (MICSC) is implemented in a field-programmable gate array board. Simulation results and experimental results are also provided to validate the proposed MICSC. [ABSTRACT FROM PUBLISHER]

This paper proposes a new modulation scheme for the three-level active neutral-point-clamped (ANPC) converter. This scheme yields new commutation loops for the three-level ANPC phase leg, which contain paralleled switching devices during commutation. The new commutation loops have better switching performance with smaller switching stress for some devices. There are also more evenly distributed loss and stress for each switching device on the phase leg. Moreover, the switching states of the new modulation scheme also reduce the conduction loss of the neutral current. In addition, the proposed modulation scheme needs less pulsewidth modulation (PWM) comparators per phase compared with the conventional scheme. The simple gate signal logic can be applied to any sinusoidal PWM or space vector modulation strategies. Double pulse tests for the new commutation loops show the improved switching characteristics under different load current cases. In addition, the quantitative analysis of the system loss breakdown and the phase leg loss distribution verifies the loss reduction and redistribution result. The proposed method is also applied on a 200-kW three-level ANPC converter for verification. [ABSTRACT FROM PUBLISHER]

This paper proposes a voltage balancing method for a flying capacitor multilevel converter based on the phase-disposition sinusoidal pulsewidth modulation (PD-SPWM). This voltage balancing method uses redundant switching states, which are determined by the minimization of a cost function. The implementation of the PD-SPWM using standard triangular carriers leads to additional switching events that are due to the transitions within the same voltage level, thus increasing the switching frequency of the power devices. Such drawback can be avoided by using sawtooth carrier waveforms. Another characteristic of the proposed voltage balancing method is that it does not require the tuning of parameters to achieve optimal performance. Simulation and experimental results confirm the robustness of the proposed method operating with different loads and transient conditions. [ABSTRACT FROM PUBLISHER]