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In this paper, a novel topology of six-level inverters for a medium-voltage high-power applications is proposed, which consists of inner flying-capacitor inverter (FCI) units and outer two-level inverter units. The proposed topology can reduce the number of devices, components, and isolated sources compared with the existing ones in the case of the same number of output voltage steps, which result in a reduction of the size and weight of the inverters. Also, the total power loss of the proposed topology is lower than that of the diode-clamped inverter (DCI) and FCI. Besides, the estimated cost of the proposed topology is about 60.5% and 81.3% compared with the DCI and FCI, respectively. In addition, the modulation technique and the control strategy for the dc-link capacitor and flying-capacitor voltages are developed for the proposed topology. The effectiveness of the proposed six-level inverter for the medium-voltage applications has been verified by simulation results. Also, the feasibility of the proposed inverter has been proved by experimental results for the prototype at the laboratory. [ABSTRACT FROM AUTHOR]

This paper presents a finite-control-set model predictive control (FCS-MPC) for grid-tied packed U cells (PUC) multilevel inverter (MLI). The system under study consists of a single-phase 3-cells PUC inverter connected to the grid through filtering inductor. The proposed competitive topology allows the generation of 7-level output voltage with reduction of passive and active components compared to the conventional MLIs. The aim of the proposed FCS-MPC technique is to achieve, under various operating conditions, grid-tied current injection with unity power factor and low total harmonic distortion while balancing the capacitor voltage. Parameters’ sensitivity analysis was also conducted. The study is conducted on a low-power case study single-phase 3-cells PUC inverter and with possible extension to higher number of cells. Theoretical analysis, simulation, and experimental results are presented and compared. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid selective harmonic mitigation (SHM)-selective harmonic elimination (SHE) switching technique based on pulse-amplitude modulation (PAM) concept. It has been applied on a four-leg neutral-point-clamped (NPC) inverter to eliminate and mitigate more harmonic orders than recently proposed hybrid SHM-SHE-pulse width modulation (PWM) method while generating switching pulses at the same frequency. In conventional SHE and SHM techniques, equations are solved to attain the switching angles. Regarding the PAM, value of inverter dc voltage can be considered as an additional degree of freedom by which the flexibility of such techniques would be increased maintaining the switching frequency. In the proposed SHM-SHE-PAM, the conventional equations are reformulated to obtain constant switching angles for a vast range of modulation index (ma) applied on a four-leg NPC inverter. Switching pulses of the three-phase legs and the fourth leg are calculated to mitigate the nontriplen harmonics and eliminate the triplen ones, respectively. Due to the unique switching angles valid in the whole range for ma, the calculation time and volume (storage capacity) are significantly reduced leading to a simpler controller implementable on a low-risk and cheap AVR chip. Experimental tests’ results of a four-leg NPC inverter as UPS application prove the good dynamic performance and accuracy of the proposed implemented switching technique in producing associated pulses for the inverter switches at very low frequency to mitigate/eliminate undesired harmonic orders from the output phase/line voltage waveforms without using bulky filters. [ABSTRACT FROM AUTHOR]

This paper presents a new E-type module for asymmetrical multilevel inverters (MLIs) with reduced components. Each module produces 13 levels with four unequal dc sources and 10 switches. The design of the proposed module makes some preferable features with a better quality than similar modules such as the low number of semiconductors and dc sources and low switching frequency. Also, this module is able to create a negative level without any additional circuit such as an H-bridge, which causes reduction of voltage stress on switches. Cascade connection of the proposed structure leads to a modular topology with more levels and higher voltages. Selective harmonics elimination pulse width modulation (SHE-PWM) scheme is used to achieve high-quality output voltage with lower harmonics. MATLAB simulations and practical results are presented to validate the proposed module good performance. Module output voltage satisfies harmonics standard (IEEE519) without any filter in output. [ABSTRACT FROM AUTHOR]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents a harmonic elimination technique based on a three-level dodecagonal space vector structure for open-end winding induction motor (IM) drives with a single-dc supply. Advantages of dodecagonal space vector switching and multilevel inverters are achieved with a single-dc supply. A dc supply-fed three-level flying capacitor (FC) inverter feeds active power to one end of the IM winding terminals and H-bridge connected capacitors eliminate fifth- and seventh-order harmonics from the other end. A pulsewidth modulation (PWM) technique is developed to switch the three-level dodecagonal space vectors and simultaneously control the H-bridge capacitors at 0.1445V\text{dc}. The fifth- and seventh-order harmonics are eliminated for the full modulation range of the three-level FC inverter, including the extreme 6-step operation. An increase in the linear modulation range has been achieved, resulting in improved dc bus utilization. Harmonic elimination is achieved by increasing switching frequency of the low-voltage capacitor connected H-bridge inverter; thus, switching frequency for the high-voltage dc supply-fed FC inverter is not increased. Using the proposed scheme, the instantaneous phase voltage never exceeds \frac23V\text{dc} (maximum phase voltage applied for hexagonal space vector structure) for which the machine windings are rated. Additionally, the proposed inverter has also been shown to operate for field oriented control of the open-end winding IM drive. [ABSTRACT FROM AUTHOR]

Multilevel converters have received more attention recently. Multilevel converters can be used not only in high-voltage high-power applications, but also in energy storage systems, thanks to reduced harmonics and electromagnetic interferences. State-of-charge (SoC) balancing of the storage system cells within cascaded multilevel inverters, e.g., batteries, can be one of the challenges in practical applications. Different methods have been studied and reported in technical literature. However, the SoC balancing is still a challenging issue. In this paper, a new method is proposed to solve this problem by applying several clever but simple changes to the staircase modulation switching scheme without changing the output waveform properties. Validations for this simple method were performed through simulation and experimental prototype. Despite the simplicity of the method, the simulation and experimental results show that SoC balancing of the cells has significantly improved. [ABSTRACT FROM PUBLISHER]

The performance of Voltage Source Inverter (VSI) is affected by power semiconductor nonlinearities, dead time, and control delay. The compensation of these nonlinear effects is necessary to meet requirements in terms of current quality and high efficiency, especially for grid-connected power conversion systems. In this paper, the effects of nonlinearities are widely analyzed and a new compensation technique for a steady-state current-controlled VSI is proposed. It is based on a step-by-step voltage compensation on the basis of the current error evaluated within each control interval. As a result, a complete compensation is achieved within a whole period of the fundamental. To cope with the zero-current clamping effect, the proposed compensation technique is implemented in a recursive way. For slow-dynamic applications, such as photovoltaic systems, this method allows achieving high performance with very low computational requirements. [ABSTRACT FROM PUBLISHER]

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two- three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (Vdc/18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop $V/f$ control scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a model-predictive control (MPC) has been designed and implemented on the packed U-cell (PUC) inverter, which has one isolated dc source and one capacitor as an auxiliary dc link. The MPC is designed to regulate the capacitor voltage at the desired magnitude to have seven voltage levels at the output of the inverter. Since grid-connected application is targeted by this application, the inverter should be capable of supplying requested amount of active and reactive power at the point of common coupling (PCC) as well. Therefore, MPC should also consider the line-current control to monitor the exchange of reactive power with the grid while injecting appropriate active power at low total harmonic distortion (THD). Various experimental tests including change in dc-source voltage, active power variation, and operation at different power factor (PF) have been performed on a laboratory prototype to validate the good performance obtained by the proposed MPC. The dynamic performance of the controller during sudden changes in dc capacitor voltage, supply current, and PF demonstrates the fast and accurate response and the superior operation of the proposed controller. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive control (MPC) scheme for quasi-Z-source (qZS) three-phase four-leg inverter. In order to cope with the drawbacks of traditional voltage source inverters (VSIs), a qZS three-phase four-leg inverter topology is proposed. This topology features a wide range of voltage gain which is suitable for applications in renewable energy-based power systems, where the output of the renewable energy sources varies widely with operating conditions such as wind speed, temperature, and solar irradiation. To improve the capability of the controller, an MPC scheme is used which implements a discrete-time model of the system. The controller handles each phase current independently, which adds flexibility to the system. Simulation and experimental studies verify the performances of the proposed control strategy under balanced and unbalanced load conditions as well as single-phase open-circuit fault condition. [ABSTRACT FROM PUBLISHER]

This paper addresses theoretical calculation of a single-phase multilevel pulsewidth modulation (PWM) inverter current total harmonic distortion (THD). Analytical approach introduced in late 1980s for a two-level inverter is generalized for an arbitrary level count for a single-phase inverter. Although the obtained closed-form piecewise analytical solutions assume (infinitely) large ratio of switching and fundamental frequencies and pure inductive load, they are practically very accurate for the ratios of (apparent) switching and fundamental frequencies larger than 25–30 and inductance-dominated loads. Along with strict mathematical solutions, simple accurate Bessel function approximation and hyperbolic average trend one are suggested. The formulas clearly reveal a single-phase PWM inverter current THD dependence on modulation index for an arbitrary voltage level count and are easily modified to cover grid-connected cases. [ABSTRACT FROM PUBLISHER]

The aim of this paper is to present a new structure for switched-capacitor multilevel inverters (SCMLIs) which can generate a great number of voltage levels with optimum number of components for both symmetric and asymmetric values of dc-voltage sources. The proposed topology consists of a new switched-capacitor dc/dc converter (SCC) that has boost ability and can charge capacitors as self-balancing by using the proposed binary asymmetrical algorithm and series–parallel conversion of power supply. The proposed SCC unit is used in new configuration as a submultilevel inverter (SMLI) and then, these proposed SMLIs are cascaded together and create a new cascaded multilevel inverter (MLI) topology that is able to increase the number of output voltage levels remarkably without using any full H-bridge cell and also can pass the reverse current for inductive loads. In this case, two half-bridge modules besides two additional switches are employed in each of SMLI units instead of using a full H-bridge cell that contribute to reduce the number of involved components in the current path, value of blocked voltage, the variety of isolated dc-voltage sources, and as a result, the overall cost by less number of switches in comparison with other presented topologies. The validity of the proposed SCMLI has been carried out by several simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge switched boost inverter (HB-SBI) is proposed. The proposed half-bridge inverter uses more active elements rather than capacitors and inductors in comparison with the conventional half-bridge Z-source inverter with two Z-networks, which results in reduction of weight, size, and cost. Moreover, the proposed inverter has the capability of eliminating inverter leg short-circuit issues and is able to further increase the output voltage level in comparison with its conventional types. Generating zero-level output voltage is also another advantage of this topology. Based on theoretical calculations, the steady-state and small-signal analysis of the proposed topology in different operating modes are performed and the ripple of inductors’ current and capacitors’ voltage are also calculated. A comprehensive comparison is also made between the proposed inverter and the conventional types. Finally, the experimental results are provided to reconfirm the performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) is a promising new topology for high-voltage applications. The MMC is made of several identical submodules. For proper operation, each submodule can be considered as a controlled voltage source where capacitor’s voltage should be maintained at a certain level. Besides, the minimization of the circulating current, which does not flow to the load, is crucial for achieving stable and efficient operation of the MMC. The interrelations among the load current, circulating current, and capacitor voltages complicate the MMC control. This paper aims to achieve stable and balanced voltage and current control with reduced circulating current in various operating conditions. The proposed control uses weighted model predictive control based on a normalized cost function to select the inverter switching patterns, which control the load current, while minimizing voltage fluctuation and circulating current. The weighting factors were selected based on minimizing the load-current total harmonic distortion (THD) and circulating current. The analysis is conducted on a low-power case study of single-phase four-cells MMC with possible extension to higher number of cells. The low-power three-level prototype is designed and built to validate this proposed method. Theoretical analysis, simulation, and experimental results are presented and compared. Parameter sensitivity analysis was also conducted. They all confirm the effectiveness of the proposed control method. [ABSTRACT FROM PUBLISHER]

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future. [ABSTRACT FROM PUBLISHER]

The flying capacitor multilevel inverter (FCMLI) is one of the well-known structures of multilevel inverters having attracted considerable attention because of its merits. In spite of its many advantages, it has some limitations such as high volume and complicated control method because of its bulky capacitors and their voltage balancing requirement. Moreover, the high number of power semiconductors required makes this structure susceptible to failure. To increase the ratio of the number of levels to the number of components, an uneven distribution of capacitor voltages has been suggested in previous reports; however, this approach complicates the control method. Up to now, almost all presented methods suffer from high computational load and/or structure-dependent algorithm. In this paper, a simple state-based and structure-independent method is proposed for capacitor voltage regulation. The proposed method is straightforward and can perform online computation of switching sequences in a computationally efficient manner without any need for stored information or look-up tables. The method is conveniently extendible to any number of cells and levels in an FCMLI structure with arbitrary dc link voltage distribution schemes. Simulation and experimental results show the effectiveness and simplicity of this method. [ABSTRACT FROM PUBLISHER]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

A four-level open-end winding induction motor (OEWIM) drive is known to suffer from two perennial problems. One is the problem of zero-sequence currentin the motor phases, which is caused by the existence of zero-sequence voltage in them. The other is the overcharging of the dc-link capacitor of theinverter operated with lower dc-link voltage by its counterpart operated with a higher dc-link voltage. This paper investigates the applicability of aspecial variant of space vector pulse width modulation (SVPWM) scheme for a recently proposed power circuit configuration, in which arectifier–inverter combination is nested within the conventional two-level inverter configuration to achieve four-level inversion. This PWM schemeis named as the sample-averaged zero-sequence elimination (SAZE) SVPWM scheme, wherein the zero sequence voltage is suppressed in each sampling timeperiod in the average sense. Both of the aforementioned problems encountered in this drive are successfully overcome for this power circuit configurationby resorting to the proposed SVPWM strategy. [ABSTRACT FROM PUBLISHER]

This paper presents proportional integral direct torque control (PIDTC) and fuzzy-2 DTC (F2DTC) of the induction motor (IM) drive using space vector pulse width modulation (SVPWM) for three-level diode-clamped inverter (TDCI). The above control schemes have been implemented in the laboratory using 2 HP IM through a DSPACE DS-1104 controller. The control schemes are capable to balance the dc-link capacitor voltages of TDCI by selecting an optimum voltage vector without using an extra controller. However, the three-level PIDTC of an IM gives poor transient performance during starting, loading, and speed reversal with considerable current and voltage total harmonic distortion (THD). In addition, it takes more time to reach the steady state with large spikes on capacitor voltages during the load or speed variation. This is due to poor performance of the PI controllers (speed and torque). In F2DTC, the conventional PI controllers are replaced by Mamdani-type fuzzy-2 controllers using a centroid method with simple logical rules. The simulated and experimental performance show that F2DTC for the three-level inverter-fed IM drive provides a fast dynamic response, less current and voltage THDs, considerable less distortion in flux and torque, and fewer spikes on capacitor voltages as compared to PIDTC. [ABSTRACT FROM PUBLISHER]

In an electric drive vehicle (EDV), the available voltage on a dc-link is limited, and so the inverter output voltage and, consequently, the line motor maximum speed are limited. The fundamental voltage of the inverter output is increased approximately 27% using a square wave (SW) switching pattern instead of a sine wave switching pattern. However, this pattern can only be used at high speeds, and at lower speeds a pulsewidth modulation (PWM) pattern should be used. In order to achieve proper control, the switching pattern should be changed seamlessly. In the present paper, a new PWM scheme for single-mode seamless control of Vernier motors is proposed. In the proposed scheme, the reference voltage is modified to change the switching pattern continuously so that the voltage changes smoothly from a high-frequency pattern to an SW and voltage discontinuity does not occur. Experimental results reveal that the inverter-switching pattern changes smoothly from a sinusoidal PWM pattern to an SW pattern, and so seamless control from the constant-torque region to the constant-power region, and vice versa, is achieved. Since the proposed scheme is a single-mode control, it is much simpler than current technologies, which are based on multimode controllers. Also the proposed method has a lower total harmonic disturbance (THD) as well as a lower harmonic distortion factor (HDF) compared to some existing methods. [ABSTRACT FROM PUBLISHER]

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive. [ABSTRACT FROM PUBLISHER]

This paper describes a single-phase full-bridge inverter that possesses limited current ripple at the dc link while providing a sinusoidal square power at the ac output. This is achieved through the addition of an extra pair of switches and complementary control for the full-bridge inverter. The extra switches operate to prevent the double-line frequency ripple current from flowing into the input of the inverter. In doing so, the pulsation component of the sinusoidal square output power is confined to flow between the output capacitors and the load. Thus, the dc link input only supplies the dc component of the output power. Simulation and experimental results validating the proposed solution are presented. [ABSTRACT FROM PUBLISHER]

In this paper, a novel grid-connected high step-up inverter is proposed. The topology is composed of two stages. The first stage is a single-switch high step-up dc–dc converter with bipolar outputs, and the second stage is a conventional half-bridge dc–ac grid-connected inverter. Negative grounding of the photovoltaic (PV) module has resulted in elimination of unwanted ground leakage currents in the PV system. Simple structure, employing few semiconductor switches, simple control, and high efficiency are the features of the proposed topology. Theoretical analysis and principal operation of the circuit are discussed. An experimental prototype is implemented to verify the performance of the proposed inverter. The experimental results confirm the aforementioned features and the theoretical analysis of the converter operation. [ABSTRACT FROM PUBLISHER]

This paper presents a sliding-mode control (SMC) strategy for single-phase grid-connected \mboxLCL-filtered voltage source inverters (VSIs) with double-band hysteresis scheme. The proposed SMC is simpler than the existing SMC methods devised for grid-connected VSIs since its sliding-surface function requires the sensing of capacitor voltage and grid current only. In addition, a double-band hysteresis scheme which ensures the switching of a transistor in the VSI during a half cycle while it remains either on or off in the other half cycle of the fundamental period is used to mitigate the switching frequency. Furthermore, the analytical expressions for the instantaneous and average switching frequencies are derived. The theoretical considerations and analytical results are verified through computer simulations and experimental results obtained from a 3.3-kW system. Simulation and experimental results show that the proposed SMC strategy exhibits an excellent performance in achieving the required control objectives such as fast dynamic response, robustness, sinusoidal grid current with low total harmonic distortion, and simplicity in a practical implementation. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

In this paper, three overmodulation techniques for the three-to-five-phase indirect matrix converter (IMC) are proposed. The first technique utilizes only the adjacent large vectors in the sector in which the reference output voltage vector lies. The second technique improves on that by continuously adapting vector elimination in the d_2-q_2 vector space based on the output voltage requirements. The third technique utilizes the ripple in the dc link to further reduce the modulation index of the inverter stage during overmodulation. All three techniques increase the voltage transfer ratio of the three-to-five-phase IMC from 0.788 to 0.923, but with the addition of harmonics generated by a vector in the d_2-q_2 vector space of the inverter stage. Simulation and experimental results from a prototype three-to-five-phase IMC validate the three proposed overmodulation techniques. [ABSTRACT FROM AUTHOR]

This paper presents the establishment and operation control of a dc microgrid incorporating with electric vehicle (EV) as movable energy storage. The developed microgrid consists of a wind permanent-magnet synchronous generator ac source and a dc source, a battery/supercapacitor (SC)/flywheel hybrid energy storage system, and a grid-connected bidirectional single-phase three-wire (1P3W) load inverter. Various harvested ac and dc sources can be plugged into the microgrid via the developed interfaced power converters. In addition to good microgrid operation performance, the microgrid-to-grid and grid-to-microgrid operations can be successfully conducted with good power quality. As to the developed EV interior permanent-magnet synchronous motor drive, the SC auxiliary storage is equipped to assist the main battery source in intermittent energy conversion. Satisfactory acceleration/deceleration/reversible and regenerative braking operation characteristics are obtained via the developed power stages and control schemes. Moreover, the successful microgrid-to-vehicle and vehicle-to-microgrid interconnected operations of EV and microgrid are achieved. In addition, the vehicle-to-grid/grid-to-vehicle operations can be also performed via the developed 1P3W inverter. [ABSTRACT FROM AUTHOR]

Hysteresis model predictive control (HMPC) is a variant of finite-control-set model predictive control, which is mainly developed for high-power applications. In this paper, the HMPC scheme is proposed to control a high-power grid-connected two-level voltage source inverter with an inductive-capacitive-inductive (LCL) filter. To ensure the stable operation of the control system, the resonance characteristics of the system with an LCL filter based on HMPC are analyzed, and an active damping scheme is then given. On the other hand, the impacts of the modeling error on system stability and average switching frequency are analyzed in detail. Then, a new switching frequency-adaptive control scheme that uses the average switching frequency to adjust the parameter value of the predictive model online is presented. The new control scheme can keep the average switching frequency within an acceptable operational margin, while improving the stability of the control system. For demonstration, the proposed control scheme has been implemented on a small-scale grid-connected inverter system, and the results show that the theoretical analysis is correct and that the proposed control scheme is effective. [ABSTRACT FROM AUTHOR]

In this paper, a modified zero-voltage-switching pulsewidth-modulation inverter with a digital-signal-processor-based proportional–integral–derivative (PID)-like fuzzy controller (PIDFC) is implemented. The switches of the inverter can achieve a soft-switching feature that can largely reduce switching losses and improve the converting efficiency. In order for the online control of the proposed dc–ac inverter to be feasible, a fuzzy control is designed to be a PID-like fuzzy mechanism with the complexity significantly reduced. From the results, it is shown that the PIDFC can not only stabilize the output at 110 V rms but can also improve the performance when the system load has been changed from 600 to 100 $\Omega$. Comparing with a traditional PID controller, the responding speed can be improved by 75% in the simulation, and the speed can still be improved by 35% in the practice experiment. [ABSTRACT FROM AUTHOR]

Carrier-based pulsewidth-modulation (CBPWM) techniques are popular due to their simplicity, and have been widely researched for various three-phase inverter configurations. In this paper, two CBPWM techniques are proposed to reduce the common-mode (CM) voltage generated by the five-phase inverter. The five-phase inverters have more flexibility in reducing the CM voltage than their three-phase counterparts because they have more phase legs, hence finer control over the star-point voltage of the load. Two methods are proposed for the conventional two-level five-phase inverter to reduce the CM voltage; one utilizing adjacent modulating waveforms and the other utilizing nonadjacent modulating waveforms. The coupled inductor inverter (CII) uses coupled inductors to generate multilevel outputs. As the volt-second balance must be maintained across each coupled inductor, direct application of the proposed methods on the CII inverter will result in overcurrents in the coupled inductors. Hence, the proposed methods are further improved to ensure the volt-second integral over each switching period is zero. Moreover, the two proposed methods are designed to reduce switching events and prevent unexpected states occurring during the switching transitions. The performance and the switching strategy of both methods are verified by both simulations and experiments on a prototype of five-phase CII. [ABSTRACT FROM AUTHOR]

Multiphase machines are well known for their fault-tolerant capability. Star-connected multiphase machines have fault tolerance in an open circuit. For an inverter switch short-circuit fault, it is possible to keep a smooth torque of a permanent magnet synchronous machine if the currents of the faulty phases are determined and their values are acceptable. This paper investigates fault-tolerant operations of an open-end five-phase drive, i.e., a multiphase machine fed with a dual-inverter supply. Inverter switch short-circuit fault is considered and handled with a simple solution. Original theoretical developments are presented. Simulation and experimental results validate the proposed strategy. [ABSTRACT FROM AUTHOR]

In this paper, a fault-tolerant single-phase five-level inverter configuration is proposed for photovoltaic (PV) generation systems. Conventional two-level inverters are popularly used in PV applications, but these inverters provide the output voltage with considerable harmonic content. One of the efficient ways to improve the power quality of PV generation systems is to replace a two-level inverter with a multilevel inverter. Conventional multilevel inverters reduce total harmonic distortion and filter requirements effectively, but it has limitations in terms of reliability due to increased device count and capacitor voltage balancing issues. Therefore, a fault-tolerant single-phase five-level inverter is presented, which is constructed by using a half-bridge two-level inverter, a three-level diode clamp inverter, and a bidirectional switch. The proposed inverter topology can tolerate the system faults due to failure of the source and/or switching devices with least modification in the switching combinations. It has less number of switching devices compared to conventional five-level inverters. The topology also has the energy-balancing capability between sources which helps in reducing uneven charge of batteries in case of partial shading or hotspots on one side of the PV panels. The proposed system under normal and faulty condition is simulated in MATLAB/Simulink environment, and results are verified with a laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, an advanced configuration for a symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and those most recently introduced is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced, and the control scheme gets simpler. Moreover, the reduced amount of on-state switches in the suggested configuration decreases voltage drops. Furthermore, power losses are diminished. The given simulation results confirm the feasibility of the proposed configuration. To approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared, and the provided comparison shows that the obtained results are in good agreement. [ABSTRACT FROM PUBLISHER]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

This paper presents a 100-kW 100-kHz insulated-gate bipolar transistor (IGBT) series resonant inverter for induction heating applications that uses an improved power control scheme based on the standard pulse density modulation (PDM). This standard power control is a good solution for the design of high-frequency inverters because the output power factor is near to unity in a wide range of output power, resulting in great reduction of switching losses and electromagnetic noise. However, the output current can be in discontinuous mode, particularly for resonant loads of low quality factor or for low output power or low-load operation. This output current fluctuation produces a high output current ripple that can lead to an increase in power losses and loss of accuracy of the response of the frequency tracking control. The proposed control strategy, which is called enhanced PDM (EPDM), provides twice less output current ripple, thus resulting in an improved inverter behavior in terms of frequency tracking accuracy and energy efficiency. Experimental tests have been made, in order to compare the EPDM strategy with standard power control schemes. [ABSTRACT FROM PUBLISHER]

A division–summation (D-\mathbf\Sigma) digital control for three-phase inverters to achieve active and reactive power injection has been presented. It can overcome the limitation of abc to dq frame transformation. However, the D-\mathbf\Sigma control requires four sets of control laws to cover four quadrant operations, namely, grid connection (power factor (PF) 1 $\sim\pm$0.866), rectification with PF correction, PF leading (0 \sim$ 0.866), and PF lagging (0 \sim$ −0.866). Moreover, the switching sequences for the four modes are also different from each other, increasing complexity of firmware programming. In this paper, improvement of the control law derivation and region selection for the (D), which can obtain the control law directly. Measured results from a 10-kVA 3 $\phi$ bidirectional inverter have been presented to confirm the improvement. [ABSTRACT FROM PUBLISHER]

Common-mode voltage (CMV) is one of the most important issues for the power electronics inverters. An interesting space vector modulation of the three-leg current-source inverter has been reported for the CMV reduction recently. However, it has the disadvantages of the bipolar current pulses and modulation index range limitation. In order to solve these problems, a four-leg current-source inverter with a new space vector modulation is proposed in this paper. With the proposed method, the system CMV can be significantly reduced without bipolar current pulses and modulation index range limitation. Finally, the experimental tests are carried out on a four-leg current-source inverter, and the experimental results verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

According to the requirement of fuel cell generation system, this paper presents a new single-stage and boost-voltage grid-connected inverter, as well as the signal modulation diagram in a line cycle. In the proposed inverter, one of the bridge legs is shared with a boost converter. The boost inductor current is designed in discontinuous conduction mode, which can effectively decrease low-frequency current ripple (LFCR) in the output current of the fuel cell. The switching modes of the proposed inverter are analyzed in positive and negative half line cycles, respectively. The LFCR in the output current of the fuel cell is analyzed, from which the design principle of the boost voltage inductor is obtained. The per-unit current values of the shared switches and the loss of the whole system are derived and compared with those of the conventional inverter. Experimental verifications are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In photovoltaic (PV) grid-connected generation system, the key focus is how to expand the generation range of the PV array and enhance the total efficiency of the system. This paper originally derived expressions of the total loss and grid current total harmonics distortions of cascaded inverter and H-bridge inverter under the conditions of variable output voltage and power of the PV array. It is proved that, compared with the H-bridge inverter, the operation range of the cascaded inverter is wider, whereas the total loss is larger. Furthermore, a novel online variable topology-type grid-connected inverter is proposed. A bidirectional power switch is introduced into the conventional cascaded inverter to connect the negative terminals of the PV arrays. When the output voltages of the PV arrays are lower, the proposed inverter works under cascaded inverter mode to obtain wider generation range. When the output voltages of the PV arrays are higher, the proposed inverter is transformed into equivalent H-bridge inverter mode to reduce the total loss. Thus, wider generation range and higher efficiency are both implemented. Specific demonstration of the proposed inverter based on five-level cascaded inverter is presented. The detailed experimental results verify the accuracy and feasibility of the theoretical analysis and the proposed inverter topology. [ABSTRACT FROM PUBLISHER]

This paper proposes an improved half-bridge inverter with wide-input-voltage capability for ozone-driven circuits. The study is motivated because the limited regulation of input voltage often affects the operation flexibility of ozone-driven circuits. Therefore, a modification of a half-bridge inverter along with a multiwinding coil design is proposed in this study, anticipating an increase in the range of input voltage and benefiting the industry applications. To confirm the practicality of this method, a hardware circuit was made with extensive validation. Experimental outcomes support the feasibility of this proposed method for ozone generators, exhibiting a potential of the method extending to other voltage-source applications. [ABSTRACT FROM PUBLISHER]

Due to the higher attenuation of switching frequency current harmonics, the $LCL$ filter has been widely used in grid-connected inverters. To deal with the resonance of the $LCL$ filter, the capacitor current is usually fed back to damp the resonance actively. However, the computation and pulsewidth modulation (PWM) delays in the digital control system have a significant influence on the active damping method, resulting in poor system robustness. Meanwhile, these delays also reduce the control bandwidth greatly and thus impose a severe limitation on the low-frequency gains. In this paper, a real-time computation method with dual sampling mode is proposed to remove the computation delay from the inner active damping loop and the outer grid-current control loop simultaneously; thus, the system robustness and the control performance can be greatly improved. Moreover, the time duration between the sampling instant and the switching transition of the inverter bridge is extended by the proposed method, which effectively prevents the switching noise distorting the sampled signals. Therefore, the noise immunity of the inverter is also improved greatly. Experimental results from a 6-kW $LCL$-type single-phase grid-connected inverter confirm the theoretical expectations and the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper presents an effective circuit configuration of a multilevel inverter that can increase the number of output voltage levels with a reduced number of circuit components. The proposed seven-level pulsewidth-modulation inverter consists of a single dc voltage source with a series of capacitors, diodes, active switches for synthesizing output voltage levels, and an H-bridge cell. After theoretical analysis, we carry out computer-aided simulations and experiments to verify the validity of the proposed approach. Here, we also introduce a modified switching strategy to solve the capacitor voltage unbalancing that occurs in series-connected capacitors. [ABSTRACT FROM PUBLISHER]

This paper presents a novel microinverter for a single-phase grid-connected photovoltaic (PV) system. The proposed microinverter consists of a step-up dc–dc converter using an active-clamp circuit with a series-resonant voltage doubler and a high-efficiency inverter with single-switch-modulation step-down converters. The active-clamp circuit provides zero-voltage switching (ZVS) turn-on, recycles the energy stored in the leakage inductance of the transformer, and limits switch voltage stress. Moreover, to remove the reverse-recovery problem of the rectifier diodes, a series-resonant voltage doubler is used. Thus, this whole process provides high efficiency. To improve efficiency and reliability in the proposed inverter, only a single switch is modulated at the switching frequency without a shoot-through problem. A modified controller is also adopted to achieve fast output control. Thus, the proposed PV microinverter has the structure to minimize power losses. The experimental results show a maximum efficiency of 96.2% for a 400-W microinverter. [ABSTRACT FROM PUBLISHER]

The phasor-PWM-based current source inverter (CSI) is a boost inverter. The difference between conventional CSIs and the boost inverter is that the boost ratio (VLLrms/Vdc ) in the boost inverter can easily be above 3.0, whereas this ratio is around 1 in conventional CSIs. In order to realize the potential capabilities of the boost inverter and to assist its penetration into renewable energy systems, the boost inverter dynamic behaviors are studied in this paper. First, the large- and small-signal models as well as the dq-equivalent circuits of the boost inverter are presented. Then, the developed models are verified using circuit simulations and experiments on a laboratory-scale 2-kW 208/240- V_{\rm LLrms} V_{\rm dc}=65\ \hbox{V} $ boost inverter made of reverse-blocking IGBTs. Finally, the developed small-signal model is used to study the stability of the boost inverter through root locus of small signal poles (eigenvalues) as control inputs, and load parameters vary within the boost inverter's operating limits. [ABSTRACT FROM PUBLISHER]

Three-phase multilevel (ML) inverters are used in many medium- and high-power applications such as motor drives and grid-connected systems. Despite the fact that numerous pulsewidth modulation (PWM) techniques for ML inverters have been developed, the impact of these modulation schemes on the peak-to-peak output current ripple amplitude has not been addressed yet. In this paper, analysis and comparison of current ripple for two-level (2L) and three-level (3L) voltage source inverters are given. Reference is made to optimal and popular modulation, so-called centered PWM, easily obtained by both carrier-based modulation (phase disposition, with proper common-mode voltage injection) and space vector modulation (nearest three vectors). It is shown that the peak-to-peak current ripple amplitude in 3L inverters can be determined on the basis of the ripple in 2L inverters, obtaining the same results as by directly analyzing the output voltage waveforms of the 3L inverters. This procedure can be readily extended to higher level numbers. The proposed analytical developments are verified by both numerical simulations and experimental tests. [ABSTRACT FROM PUBLISHER]

Power converters are complex devices subject to failures that can lead to undesired stops. For this reason, many fault-tolerant topologies and strategies have been deeply studied, mainly focusing on improving the electromechanical behavior of the reconfigured drive after the fault. However, it is also very important to evaluate the possible increase of power losses. In this paper, a power loss analysis is performed on a current-controlled three-phase inverter supplying a permanent-magnet synchronous motor (just chosen as an example), for all the operating modes, starting from the fault occurrence until the faulty operation mode is established. This is particularly important because the effectiveness of a fault-tolerant control strategy depends on the possibility to maintain a continuous operation. The latter is ensured only if there is no such increment of the losses that the survival of the component is at risk. The simulations are validated by means of experimental tests, and the results are discussed. The method can be easily applied to other topologies and reconfiguration strategies. [ABSTRACT FROM PUBLISHER]

A switched boost inverter (SBI) can replace a $Z$-source inverter (ZSI) in low-power applications because it has one less $LC$ pair than the ZSI. This paper presents a class of quasi-SBIs (qSBIs) that offers several advantages when compared with a conventional SBI, including reducing the voltage stress on the capacitor, increasing the boost voltage factor, and improving input current profiles. Operating principles, steady-state analysis, and comparisons with conventional inverters are presented. A prototype based on a TMS320F28335 digital signal processor is built to verify the operating principle of the proposed qSBIs. [ABSTRACT FROM PUBLISHER]

In this paper, a new single-phase cascaded multilevel inverter is proposed. This inverter is comprised of a series connection of the proposed basic unit and is able to only generate positive levels at the output. Therefore, an H-bridge is added to the proposed inverter. This inverter is called the developed cascaded multilevel inverter. In order to generate all voltage levels (even and odd) at the output, four different algorithms are proposed to determine the magnitude of dc voltage sources. Reduction in the number of power switches, driver circuits, and dc voltage sources is the advantage of the developed single-phase cascaded multilevel inverter. As a result, the installation space and cost of the inverter are reduced. These features are obtained by the comparison of the conventional cascaded multilevel inverters with the proposed cascaded topology. The ability of the proposed inverter to generate all voltage levels (even and odd) is reconfirmed by using the experimental results of a 15-level inverter. [ABSTRACT FROM PUBLISHER]