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Low leakage current and high efficiency are two key indexes for the transformerless photovoltaic (PV) grid-connected inverter. The transformerless inverter topologies have superior efficiency owing to saving the transformer, but their switches are still on a hard-switching state at present. This paper presents a novel zero-voltage transition (ZVT) concept for the full-bridge transformerless PV grid-connected inverter topologies. The zero-voltage turn-on and turnoff of the high-frequency main switches and the zero-current turn-on of the auxiliary switches, as well as the zero-voltage turn-on and turnoff of the antiparallel diodes of the line-frequency switches, are realized by introducing two resonant tanks. Take ZVT-H6-I for example. The operation principle, soft-switching conditions, duty cycle restriction, and parameter design rule of the resonant tank are analyzed in detail. Finally, the validity of the ZVT concept is verified by a ZVT-H6-I prototype rated at 100 kHz and 1 kW. [ABSTRACT FROM PUBLISHER]

In this paper, two new topologies are proposed for multilevel inverters. The proposed topologies consist of a combination of the conventional series and the switched capacitor inverter units. The proposed topologies reduce the number of switches and isolated dc voltage sources, the variety of the dc voltage source values, and the size and cost of the system in comparison with the conventional topologies. In addition, the proposed topologies can double the input voltage without a transformer. There is no need for complicated methods to balance the capacitor voltage. The simulation and experimental results of single-phase 25- and 17-level inverters are given to prove the correct operation of the proposed topologies. [ABSTRACT FROM PUBLISHER]

High-boost dc-ac inverters are used in solar photovoltaic (PV), fuel cell, wind energy, and uninterruptible power supply systems. High step-up and step-down capabilities and shoot-through immunity are some of the desired properties of an inverter for a reliable, versatile, and low-distortion ac inversion. The recently developed Z-source inverter (ZSI) possesses these qualities. However, the realization of ZSI comes at a cost of higher passive component count as it needs two sets of passive filters. A switched boost inverter (SBI) has similar properties as ZSI, and it has one L\-C pair less compared to ZSI, but its gain is less than ZSI. This paper proposes the current-fed switched inverter (CFSI) which combines the high-gain property of ZSI and low passive component count of SBI. The proposed inverter uses only one L\-C filter and three switches apart from the inverter structure. The inverter topology is based on current-fed dc/dc topology. Steady-state analysis of the inverter is presented to establish the relation between the dc input and the ac output. A pulse width modulation (PWM) control strategy is devised for the proposed inverter. An experimental prototype is built to validate the proposed inverter circuit in both buck and boost modes of operation. A 353-V dc-link and a 127 V (rms) ac are obtained from a 35.3-V dc input to demonstrate the boost mode of operation. A 200-V dc-link and a 10.5-V (rms) ac are obtained from a 37.8-V dc input to verify the buck mode of operation of CFSI. [ABSTRACT FROM PUBLISHER]

In this paper, a new general cascaded multilevel inverter using developed H-bridges is proposed. The proposed topology requires a lesser number of dc voltage sources and power switches and consists of lower blocking voltage on switches, which results in decreased complexity and total cost of the inverter. These abilities obtained within comparing the proposed topology with the conventional topologies from aforementioned points of view. Moreover, a new algorithm to determine the magnitude of dc voltage sources is proposed. The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a multilevel inverter that has been conceptualized to reduce component count, particularly for a large number of output levels. It comprises floating input dc sources alternately connected in opposite polarities with one another through power switches. Each input dc level appears in the stepped load voltage either individually or in additive combinations with other input levels. This approach results in reduced number of power switches as compared to classical topologies. The working principle of the proposed topology is demonstrated with the help of a single-phase five-level inverter. The topology is investigated through simulations and validated experimentally on a laboratory prototype. An exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology. [ABSTRACT FROM PUBLISHER]