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Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

Soft-switching techniques of transformerless photovoltaic grid-connected inverters (TLIs) can significantly reduce switching losses, as well as soften switching processes. Conventional dc–ac soft-switching configurations proposed by Dr. Deepakraj M. Divan are invalid in TLIs because of the leakage current problem. In order to develop soft-switching techniques in TLIs, this paper proposes a new soft-switching configuration and a procedure to guide the invention of soft-switching TLIs. First, this paper proposes two basic resonance tanks related to dc bus polarities, and then, uses these basic tanks to elevate four popular full-bridge-type TLIs according to the proposed guideline. As a result, four soft-switching TLIs are gained. Second, this paper picks obtained soft-switching highly efficient and reliable inverter concept (HERIC) as example to analyze its soft-switching operation principle and performance. As a consequence, all active switches of the gained soft-switching HERIC circuit are switched under both of zero-current turn-on and turn-off conditions; the reverse recovery problem of freewheeling diodes is alleviated owing to the zero-current turn-off of diodes; meanwhile, the common-mode voltage at the switching frequency scale is still constant. Finally, some experimental results from a 3-kW universal prototype at 50-kHz switching frequency are provided to verify the effectiveness of the main contributions of this paper. [ABSTRACT FROM AUTHOR]

The paper deals with some new results on the averaging theory approach for the analysis of feedback controlled pulsewidth modulation power electronic converters. It develops some considerations regarding the averaging approximation of time-variant differential systems proving an analytical relationship between the accuracy with which the solution of the averaged model converges to the solution of the original time-variant model (i.e., the switched model) and the switching frequency of the converters. This relation is valid both for stable and unstable systems. Moreover, this paper confirms, as corollary, that under suitable conditions (verified during the standard operations of the power electronic converters) the averaged model uniformly converges to the switched model. [ABSTRACT FROM AUTHOR]

A new isolated single-stage soft-switching power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) is introduced in this paper. In the proposed LED driver, the switches voltage stress and also the dc-bus voltage is limited to the peak of the line voltage. Hence, low voltage rated mosfets and diodes can be used. The efficiency is improved because the switches are turned on under zero current switching (ZCS) condition and turned off under zero voltage zero current switching (ZVZCS) condition. Also, no current feedback is required since the converter provides an output current independent of output voltage. In this paper, operating principle of the proposed LED driver is presented and design considerations are discussed. To verify the theoretical analysis, a laboratory prototype of the proposed converter for supplying a 50 W/70 V LED module from 220 Vrms/50 Hz ac mains is implemented, and the experimental results are presented. Since current feedback is not used, dimming property and operation for universal voltage range is not achievable. [ABSTRACT FROM PUBLISHER]

In applications that demand single-input dual-output (SIDO) or dual-input single-output (DISO) dc–dc converters, employing two separate single-input single-output (SISO) converters is a solution. However, the number of components is doubled, resulting in high overall cost. In order to reduce costs, this paper proposes a novel topology synthesis methodology, with which a variety of SIDO and DISO dc–dc converters with reduced components can be derived. The principle of topology synthesis states that integrated SIDO and DISO dc–dc converters can be easily developed from conventional SISO converters by replacing a diode with a basic cell inclusive of additional input/output port. The principle is effective for many SISO dc–dc converters, and as an example, topology synthesis based on buck, boost, buck–boost, Cuk, sepic, and zeta SISO converters is performed in this paper. In order to achieve better understanding of the proposed converters, the integrated SIDO Cuk converter is specifically analyzed and experimentally verified. In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter. In addition, zero-voltage-switching operation of one switch is achieved, contributing to lower switching losses. Finally, a prototype circuit with 48-V input and 156 V/1 A, 24 V/4 A outputs is built to validate the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Hybrid dc circuit breakers (HCBs) usually require a large number of insulated-gate bipolar transistors (IGBTs) with high turn-off capability for series and parallel connections. This requirement entails excessive cost. Compared with IGBTs, integrated gate-commutated thyristors (IGCTs) are another kind of fully controlled power device with high surge current and voltage capability but are low cost. However, the weak turn-off capability of IGCTs hinders their application to high-powered HCBs. On the basis of the complementary advantages of IGBTs and IGCTs, this paper proposes a mixture solid-state switch (MSS) for HCBs that uses the switching action of several IGBTs to create a low-current condition that favors the turning off of large-scale series-connected IGCTs. The MSS topology can significantly reduce cost while maintaining the excellent performance of traditional solid-state switches. This study also introduces two different turn-off modes for MSS, namely, single oscillation and multiple oscillations. Finally, 25 kV/20 kA prototypes in both modes are developed to verify the effectiveness of the MSS topology. [ABSTRACT FROM AUTHOR]

This paper introduces a novel single-phase buck–boost noninverting variable-frequency ac–ac converter that offers higher efficiency compared to the competitors. This converter utilizes a lower number of semiconductors. A simple and flexible switching strategy is also proposed, which generates the desired output waveform avoiding unnecessary high-frequency switching operation of semiconductor devices. A high reliable operation due to the elimination of the input source shoot-through risk, an inherent commutation capability that mitigates the voltage spikes across the semiconductors, a lower semiconductors rating requirement, an improved input current waveform quality, and a smaller required input filter inductor are the main advantages of the proposed converter. Thus, the proposed converter can be successfully applied to many industrial applications such as medium-frequency transformer isolation for traction and wind turbine converters, ac–dc high-voltage conversion based on Cockcroft–Walton circuit and induction heating systems. The theoretical achievements and claims are all confirmed through extensive experimental tests on a 200-W laboratory setup. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLI) with reduced components are becoming popular to achieve higher voltage levels with lower cost and complexities of the circuit. Most of the reduced switch MLIs use a large number of isolated voltage sources that have a large total standing voltage (TSV) and higher losses. Moreover, many reduced component MLIs have been developed to reduce the number of switches only and have not utilized the dc-link voltages properly. Thus, an inverter needs to be designed in which the number of dc sources is also small and utilized fully. In this paper, a novel single-phase, multicell MLI configuration is presented that can generate a maximum number of output voltage levels using a minimum number of switches and dc sources. Two optimal configurations of the proposed MLI are proposed based on the minimum requirements of components with the optimum voltage stress of the highest rated switches. Moreover, the TSV of the proposed optimal MLI also becomes low. A generalized multicell optimum MLI is presented and the number of components, voltage stress of all the switches, and the TSV of the proposed as well as the other inverters also determined by the generalized expressions for comparison purpose. The prototype of a specimen 15-level inverter and the optimal 75-level inverter cell is further developed and implemented using DS 1103 in the laboratory to show the effectiveness of the proposed configuration. The experimental results corresponding to the different modulation indices are presented here for the verification of the simulation results. [ABSTRACT FROM AUTHOR]

This paper presents primary-side voltage regulated multitransformer quasi-resonant flyback converter (MTFC) for supplying isolated power switch drivers. The proposed topology offers distinct advantages over frequently used flyback converter possessing one high frequency transformer with isolated multiple outputs. Particularly, when a large number of separate dc supply units is required, then MTFC enables improved regular distribution of magnetic coupling between the common primary and the multiple secondary transformers’ windings providing a high degree of galvanic and electromagnetic isolation between multiple outputs. Primary side voltage regulation is based on the average output voltage estimation using auxiliary RDC circuit mounted across the primary windings. Operation principles of MTFC are enhanced with analytical study of cross regulation of multiple output voltages at unbalanced load conditions, indicating reduced voltage deviation of multiple outputs by applying the primary-side average voltage regulation. Experimental results of prototype 2-, 3-, and 6-transformer quasi-resonant flyback converters confirmed their cross regulation quality and application potential for independent multiple output supplies. [ABSTRACT FROM AUTHOR]

Low-voltage enhancement-mode gallium nitride high electron mobility transistors (eGaN HEMTs) are a kind of promising devices to realize high-efficiency and high-power-density conversion because of their fast switching speed, low conduction, and switching losses. Since the reverse conduction loss of eGaN HEMTs accounts for a large part of switching losses, it is of great importance to improve the traditional switching analytical model to predict the reverse conduction loss. In this paper, a complete and accurate switching analytical model of low-voltage eGaN HEMTs is presented, which considers the effects of low-parasitic inductances, nonlinear junction capacitances and nonlinear transconductances. The turn-on and turn-off switching processes are described in detail, and the resulting equations are solved by using mathematical software such as MATLAB to predict the switching waveforms during the switching periods. And an accurate loss calculation method based on the proposed model is proposed including the reverse conduction loss. The accuracy of the proposed model is validated by comparing the predicted switching waveforms and the efficiency of a synchronous buck converter with the experimental results, respectively. Moreover, the proposed model is compared with the traditional model, which proves the advantages of the proposed model. In the end, according to the proposed complete model, the effect of the top switch (TS) gate resistance, the TS drain-source capacitance, power loop inductance, current ripple, the bottom switch (BS) gate resistance, the BS drain-source capacitance, and dead time on the loss breakdown of the synchronous buck converter is explored and some qualitative suggestions are given to improve the conversion efficiency based on these analyzing results. [ABSTRACT FROM AUTHOR]

This paper presents a lowpass–bandpass triplexer integrated switch using common lumped-element triple-resonance resonator (LE-TRR) technique. First, a lowpass–bandpass triplexer that has one lowpass channel (LPC) and two bandpass channels (BPCs) is designed. The proposed lowpass–bandpass triplexer design method is different from the conventional lowpass–bandpass multiplexer in which the feeding line is designed with lowpass response to combine bandpass structures to form lowpass–bandpass response. In this design, one branch of LE-TRR together with inductors and capacitors and another two branches of LE-TRR together with classical LC resonators are proposed to constitute one LPC and two BPCs, respectively. The LPC design combines the lowpass transformation method and parameters optimization, and two BPCs can be synthesized by classical coupled-resonator filter design theory. The designed lowpass–bandpass triplexer exhibits extremely compact size of ${\text{0.125}}\lambda _{{\rm{g}}} \times {\text{0.086}}\lambda _{{\rm{g}}}$ , and also has merits of low insertion loss, good return loss, wide bandwidth, and high port-to-port isolation. And then, p-i-n diodes are loaded on the lowpass–bandpass triplexer to realize a lowpass–bandpass triplexer integrated switch that combines both the triplexer and microwave switch function. One LPC and two BPCs are able to be switched on/off separately, and the lowpass–bandpass triplexer integrated switch has eight independent states in total. The off-state suppression of LPC is better than 36 dB, and the off-state suppression of two BPCs are better than 46 and 45 dB, respectively. [ABSTRACT FROM AUTHOR]

This paper presents a novel compact low loss switchable bandpass filter (BPF) with self-packaging by using substrate-integrated suspended line (SISL) technology. The proposed self-packaged switchable BPFs are designed by using two kinds of suspended controllable resonators, which are smaller than a quarter-wavelength resonator and the commercial p-i-n diodes are used as the control elements. The designed method of suspended controllable resonator is investigated by using an equivalent circuit model. The center frequency of the proposed low loss SISL switchable BPF is designed at 1 GHz with 56% fractional bandwidth. The measurement results show that insertion loss is 0.9 dB of the turn on state. Furthermore, a high isolation SISL self-packaged switchable BPF with more compact size is proposed for comparison. Measurement results show that the isolation is higher than 40 dB and insertion loss is 1.57 dB at 1 GHz, and its core circuit size is only ${\text{0.09}}\,\lambda _{g}\times {\text{0.04}}\,\lambda _{g}$. [ABSTRACT FROM AUTHOR]

Frequency synthesizer is a key component used in electronic systems. Two important features for judging its performance are frequency granularity and frequency switching speed. In this paper, a synthesizer built on the principle of time-average-frequency (TAF) is implemented on an FPGA system. The synthesizer is constructed entirely on the FPGA's configurable elements. The granularity is measured as 2 ppb; the frequency switching speed is experimentally illustrated as two cycles. The configuration of the synthesizer can be adjusted in the field for accommodating various performance versus cost scenarios. The aim of this paper is to provide a field-programmable frequency generator as a handy tool to FPGA users, to enable user create innovations at application level. The key contributions are the 2 ppb frequency granularity and the reconfigurable implementation of the time-average-frequency direct period synthesis (TAF-DPS) synthesizer on FPGA. [ABSTRACT FROM AUTHOR]

This paper proposes a single-vector-based model predictive control (MPC) for an induction motor drive supplied by a three-level neutral-point-clamped inverter operating at a low switching frequency. Unlike the torque and flux control in the conventional MPC, the proposed MPC tries to minimize the error between the applied voltage vector and a reference voltage vector obtained based on the principle of deadbeat control, thereby reducing the number of weighting factors in the cost function. To reduce the computational burden and restrict the high jumps in both phase and line voltages, two switching tables are proposed and compared for the preselection of candidate voltage vectors. The neutral point potential fluctuation and switching frequency are also included in the cost function to achieve the balance between the upper and lower dc voltages and a relatively low switching frequency. Furthermore, a speed adaptive stator flux observer with a novel gain matrix is proposed to achieve speed-sensorless operation, which has a higher speed and flux estimation accuracy than conventional fixed gains. Finally, the proposed MPC is extended to the field-weakening operation by adjusting the torque and stator flux references online, which significantly widens the speed range and improves the practical value of the MPC. The effectiveness of the proposed method is confirmed by the experimental results obtained at an average switching frequency of less than 600 Hz. [ABSTRACT FROM AUTHOR]

Series–parallel forward dc–dc converter system is a good option in high-voltage high-power applications. A switch fault, in this converter, should be detected as soon as possible, to avoid further damage and save maintenance cost. In this paper, a new switch fault diagnosis method, which treats output inductor voltages as diagnostic criteria, is proposed for this system. With the proposed method, expensive sensors are needless, since diagnostic signal can be easily acquired by adding a small auxiliary winding into inductor magnetic core. Based on the feature of diagnostic signals in such a system, a low-cost diagnostic circuit is designed. The failed module caused by open-circuit fault or short-circuit fault could be detected within one switching period, allowing for an immediate fault-tolerant action. This method also shows generality for different connections and buck-type isolated topologies. Besides, it works reliably under input-voltage variation and load step, and no misdiagnosis will occur during normal dynamic process. Finally, experimental result verifies the effectiveness of this method. The proposed scheme has a good potential to be applied in real applications for its simplicity and robustness. [ABSTRACT FROM AUTHOR]

This paper presents the design, analysis, and verification of a novel reaching law for discrete-time sliding-mode control. The control gains of the reaching law are automatically regulated by the power function and the exponential term that dynamically adapts to the variation of the switching function. The reaching law also employs the perturbation estimation and the difference function to redefine the change rate as the second-order difference of the uncertainty. Compared with previous methods, the proposed reaching law has the capability to amend the control gains in a wise manner, further mitigate chattering, and guarantee a smaller width of the quasi-sliding-mode domain (QSMD). In order to describe the system dynamics in the reaching phase and the sliding phase with respect to control gain values, both the decrement band and the QSMD (ultimate band) of the proposed reaching law are theoretically analyzed. The reaching steps for the switching function to converge toward the sliding surface are also obtained. The effectiveness of the proposed method is verified through numerical simulations and experimental investigations on a piezoelectric actuator. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

In this paper, a high step up converter consisting of an integrated quadratic-boost converter and a voltage doubler is proposed. The integration of the quadratic-boost converter makes the system easier to lift up its voltage gain through slightly increasing the duty ratio of the single switch. The voltage doubler further increases the voltage gain of the system as the turn ratio rises. The voltage stresses on the switch and the diodes are decreased for such cascaded topology. Different operation modes are analyzed and mathematical analysis of the converter is presented in detail. The leakage inductance contributes to realizing zero current switching of the diodes in the second boost stage and the doubler and the energy can be recycled to the load. A 38-W prototype is built to work as a vehicle LED driver. Experiments are conducted to verify the advantages of the proposed converter and the efficiency is 90% at the nominal operating point. [ABSTRACT FROM AUTHOR]

In this paper, a new modified single-switch single-ended primary inductor converter (MS2-SEPIC)-based high step-up dc–dc converter is presented. The proposed topology uses the coupled-inductor (CL) technique and a voltage tripler rectifier, which results in a high voltage gain for the converter. Here, the switching loss has been reduced significantly owing to the quasi-resonance operation of the circuit created by the leakage inductance of the CL along with circuit capacitors. The operational principles and steady-state analysis are discussed. Experimental results based on a 100 W laboratory prototype verify the validity of theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

When the selected harmonic elimination pulsewidth modulation (SHEPWM) is adopted to three-level neutral-point-clamped converters to reduce the switching frequency, the neutral-point potential (NPP) problem becomes more severe compared with other modulations. It is because there is no degree of freedom for SHEPWM to control the NPP. SHEPWM realizes a better harmonic performance by calculating the switching angles offline based on harmonic requirements. Since it is harsh to solve the angles online, we cannot change the angles to control the NPP. Aiming at the low-frequency NPP fluctuation minimum, a novel current harmonic minimum method based on the optimal third-order/ninth-order harmonic is proposed in this paper. The optimal third-order/ninth-order harmonic is derived based on the relationships among the third-order/ninth-order harmonic and the NPP. They can be utilized to realize the low-frequency NPP fluctuation minimum without changing any switching angle online. Moreover, some comparisons, such as the solution ranges, weighted total harmonic distortion, the initial value of iteration calculation, show that the proposed method has a good output performance. Finally, the experimental results are given to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

In photovoltaic systems, dc–dc converters have been identified as one of the most critical and challenging subsystem in terms of failure rate. Thus, this paper proposes fault-tolerant operation of a two-stage buck/buck–boost converter under open-circuit switch failure. Remedial actions are efficient in any failure of one of the two switches of the converter. Here, a new unified approach is considered, for the overall fault-tolerant operation of the two stages of the converter. The fault-tolerant circuit we propose lies on performing redundancy by implementing the equivalent synchronous switch for the two main switches of the two stages, in offline mode. The fault-tolerant circuit results from the basic two-stage buck/buck-boost converter and its equivalent circuit with a synchronous switch, merged together to form the new dc–dc fault-tolerant circuit. Therefore, postfault operation at full power can also be performed. By using a switch fault management unit with reduced complexity, inserted between the control block and the switches, we have designed an unified, efficient, and optimized fault-tolerant control, suitable in both healthy and postfault operations. Some selected experimental tests, which all confirm the good performances of the proposed fault-tolerant approach, are presented and discussed. [ABSTRACT FROM AUTHOR]

Soft-switching inverters can achieve high efficiencies and low switchdv/dtanddi/dt, but often impose additional stress on the switches due to their resonant behavior. Multicell converters, on the other hand, can process high voltages by arranging the switches to share the stress. This paper proposes a buck–boost multicell soft-switching inverter with inherent cell voltage balancing. Both the current and voltage stresses are shared by the cells. Soft-switching conditions are achieved for all switching transitions without any need for auxiliary circuitry or clamps. A multiple-winding transformer transfers energy between the terminals and provides galvanic isolation. An analytical study and experimental results on a 1200-W prototype verify the operation of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a sequence switching control (SSC) scheme based on an auxiliary parallel inductor is proposed to improve the transient performance of buck converters. The proposed SSC scheme introduces a small controlled inductor in parallel with the output inductor, so as to increase the inductor-current slew rate when it is activated during a load transient. Furthermore, an “n+ 1” sequence switching strategy is proposed to control the auxiliary parallel inductor. The proposed scheme divides the transient event inton+ 1 periods. In the formernperiods, the same small output voltage deviations are designed, while in the last period, a smaller deviation is done for a smooth transition from the transient to the steady state. The switching sequence is derived applying the capacitor–charge balance principle for each ofn+ 1 periods. For a given buck converter in the experiment, the settling time and the output voltage deviation of the proposed SSC scheme enhance more than 50% and 67%, respectively, over those of the time-optimal control for a 3-A load step. [ABSTRACT FROM AUTHOR]

A new light emitting diode (LED) driver circuit is presented in this paper based on the buck converter with coupled inductors for automotive applications. Soft-switching condition is provided for the switch via a passive resonant circuit incorporating the leakage inductance of the coupled inductors. Also, the leakage inductance energy is recycled to the output. The proposed converter has a very simple structure as well as high efficiency, which makes it a good candidate for battery-operated applications. The proposed converter only applies one magnetic element and the leakage and magnetizing inductances are used as resonant elements. Also, during the resonance, a resonance capacitor is approximately charged to the input voltage, and therefore, the capacitor voltage stress and semiconductor devices voltage stress are low. These are the main advantages of the proposed converter over other similar converters. The theoretical analysis is provided and the operating principles and design considerations are explained. An 8 W laboratory prototype is implemented in order to prove the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Series connection of individual semiconductors is an effective way to achieve higher voltage switches. However, the inherent unequal dynamic voltage sharing problem needs to be solved, even when well-matched gate drivers and semiconductors are used. A majority of the existing voltage balancing schemes are developed for slow-switching silicon (Si)-based semiconductors, and are also associated with a significant amount of additional losses in the control circuit or on the switches. In this paper, a novel method is proposed for balancing the dynamic voltages among series-connected silicon carbide (SiC) MOSFETs with highdv/dtrates. The method takes advantage of a small capacitor to provide additional current to the gate of the MOSFETs at turn-off, meaning the switching speed (and thus, the device voltage after turn-off) is controlled. The proposed method generates negligible losses in the control circuit, and also does not significantly increase the switching losses of the semiconductors. Experimental results are provided to prove the effectiveness of the proposed voltage balancing scheme on two SiC MOSFETs inside a module connected in series. In order to do so, an active gate driver is designed embedding the activedv/dtcontrol scheme as well as other essential functionalities needed for operation of SiC MOSFETs. [ABSTRACT FROM AUTHOR]

DC-link current ripple is one of the important factors for operating the current-source converter. In practice, the dc-link current ripple can be reduced by increasing the switching frequency or inductance. However, it may result in the higher switching losses, larger size, or higher cost. In order to deal with this problem, the inherent limitation of the conventional solution is discussed in this paper. The time-domain equation of the dc-link current is established for the first time. And then, a new space vector control strategy is proposed to reduce the ripple with no need of increasing the switching frequency or inductance. The space vector is divided into 12 sectors, where the dc-link current ripple can be effectively reduced by the optimal vector sequence. Finally, the proposed method is implemented on the TMS320F28335DSP + XC3400FPGA digital control hardware platform. The experimental results verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a novel FPGA-based matrix-inversion technique that is specifically tailored and optimized for real-time electromagnetic transients simulation of power electronic converters with high switching frequency. This is the first reported solution that is capable of solving the real-time equations related to using ideal switch model and the associated circuitry in very small time-steps (e.g., an average of 36 ns in a three-phase back-to-back converter case study), without requiring large amount of memory, being limited to small number of switches, adding parasitic elements, or depending on a priori knowledge of the circuit operation or switching strategy. The accuracy of the proposed real-time simulator is verified against the results from experimental measurements. [ABSTRACT FROM AUTHOR]

This paper proposes a new isolated single-stage single-switch power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) without electrolytic capacitor. In the proposed LED driver, the switch turns on under zero current switching (ZCS) condition. Also, it turns on at a voltage less than its nominal voltage stress, and therefore, the switch capacitive turn-on loss decreases too much extent. The leakage energy is absorbed, so there are no voltage spikes across the switch when the switch turns off. In this paper, operating principles of the proposed driver are discussed, and design considerations are presented. Also, a laboratory prototype for supplying a 21 W/30 V LED module from 220 Vrms/50\,\rm Hz ac mains is implemented, and experimental results are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, analytical expressions and design equations are presented for a class-E amplifier with MOSFET nonlinear drain–source capacitance and linear gate–drain parasitic capacitance, along with external linear shunt capacitance. The class-E amplifier characteristics are presented as functions of the ratio of the sum of the external linear shunt capacitance and the MOSFET linear gate–drain capacitance to the MOSFET drain–source junction capacitance when the switch voltage is zero. Although the effect of the MOSFET linear gate–drain capacitance is similar to that of the external linear shunt capacitance on the design of the class-E amplifier with a square input voltage, the difference between their effects should be considered for the sinusoidal input voltage, which is one of the most important suggestions in this paper. Additionally, analytical expressions of the output power capability is given, which is considerably affected by the external linear shunt capacitance. Two design examples are presented, taking into account as design specification the output power of 8.7 W and the operating frequency of 4 MHz, along with the PSpice-simulations and experimental waveforms. [ABSTRACT FROM PUBLISHER]

This paper proposes an analytical procedure for computation of all pairs of valid switching angles used in pattern generation in five-level H-bridge cascaded inverters. The proposed procedure eliminates harmonic components from inverter output voltage and, for each harmonic, returns the exact boundaries of all valid modulation index intervals. Due to its simple mathematical formulation, it can be easily implemented in real time using a digital signal processor or a field-programmable gate array. In this paper, after a detailed description of the method, simulation and experimental results demonstrate the high quality of achievable results. [ABSTRACT FROM PUBLISHER]

Although compact fluorescent lamps (CFLs) have been on the market for a long time, many of them do not achieve the same power factor as the incandescent lamps do, which presents a significant problem for the utility with the current widespread use of CFLs for household lightings. A simple single-switch electronic ballast with passive valley-fill power factor correction is proposed in this paper for CFL application. The proposed single-switch ballast circuit is able to achieve zero current switching to maximize the circuit efficiency. A simple feedback circuit with duty ratio control is also proposed to improve the high lamp current crest factor caused by the valley-fill circuit. Detailed descriptions and analysis of the circuit operating principles are provided in this paper. Simulation and experimental results are given on a 13-W CFL tube from Osram Sylvania to highlight the merits of the proposed work. [ABSTRACT FROM PUBLISHER]

Among various active cell balancing circuits, a switched capacitor circuit is promising because it can be implemented with low cost and small size. However, when the switched capacitor is applied in the lithium-ion battery, cell balancing speed is generally slow when the number of batteries is high. Therefore, this paper proposes the chain structure of the switched capacitor to increase balancing speed, particularly among outer cells. In this paper, the cell balancing principle of the conventional switched capacitor is explained, and the reason why slow cell balancing of the switched capacitor is shown in the lithium-ion battery is analyzed. To improve cell balancing speed, two circuits with chain structure are proposed. The balancing performance of the proposed circuits is confirmed by computer simulation, and a comparison between conventional and proposed circuits is presented. The theoretical analysis on the cell balancing speed of conventional structures and the proposed chain structure is also shown in this paper. Experimental tests were carried out to verify the validity of the proposed structures, and the experimental results show an improved balancing performance of the proposed circuit. [ABSTRACT FROM PUBLISHER]

The parameters of electrical energy such as voltage amplitude are very important, particularly from the viewpoint of the final consumer and sensitive loads connected to the grid. The dynamic states in the power grid—deep voltage sags and swells—might cause faults and defects in sensitive loads. This paper deals with a three-phase hybrid transformer (HT) without dc energy storage to compensate voltage sags and swells and to protect sensitive loads against the rapid and extensive changes in supply voltage amplitude. The analyzed HT contains two main units: the first one is the conventional electromagnetic transformer, realizing an electromagnetic coupling, and the second one is the buck–boost matrix-reactance chopper, realizing an electrical coupling in the HT unit. In the presented solution, output voltage is transformed in two ways—electromagnetically and electrically. This paper presents an operational description, the theoretical analysis, and the experimental test results from a 2-kVA laboratory model. On the basis of the authors' research, it can be stated that the HT makes it possible to compensate deep voltage sags (deeper than 50% of nominal source voltage) and overvoltages (up to 140% of nominal source voltage) while maintaining good dynamic properties. The main advantages of the proposed solution, in comparison to other conventional solutions, are the ability to control the output voltage in the range of 0.66–3.5 US, good dynamics (transient state during source voltage uS amplitude change is shorter than 10 ms), and galvanic separation between source and load (such as in the case of the conventional electromagnetic transformer). [ABSTRACT FROM PUBLISHER]

A circuit configuration, a circuit topological family, a buck-mode active clamped circuit, and an instantaneous output voltage feedback control strategy of combined bidirectional buck–boost dc–dc chopper-mode inverter with high-frequency (HF) link (HFL) were proposed and fully investigated in this paper. The steady principle characteristic and the design criteria for the key circuit parameters were given in this paper. The circuit configuration is composed of two identical isolated bidirectional buck–boost dc–dc choppers with the same input and output filters. These two choppers in parallel at input end and in series at output end generate unipolarity sinusoidal pulsewidth modulation current waveforms with positive and negative half low-frequency cycles separately. The circuit topological family includes four circuit topologies, such as one-transistor mode. Taking the one-transistor mode circuit topology as an example, the 750VA48VDC/220V50HzAC prototype is designed and implemented. The theoretical analysis and principle test show the inverters have excellent performance. [ABSTRACT FROM PUBLISHER]

Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented. [ABSTRACT FROM PUBLISHER]

Self-powered realization for synchronous switching circuits is a hot spot for piezoelectric vibration energy harvesting. As a well-known approach, the electronic breaker is widely used for its simplicity and reliability. It plays an important role on the performance of the piezoelectric generator by affecting the available open-circuit voltage and the switching phase lag. In this paper, a comprehensive model is developed for improved performance analysis with missed factors included in comparison with previous investigations. The combined influence of the envelope resistor and the capacitor on both the phase lag and the open-circuit voltage is newly considered while the additional phase lag effect induced by charging the switch parasitic capacitance with the envelope capacitance is supplemented. Experiments and simulations validate the proposed model with better accuracy and the results show that these supplemented factors are important to the generator performance, especially for the micropower energy harvesting with small piezoelectric capacitance or displacement magnitude. Moreover, more detailed design guidelines are deduced from the proposed model. [ABSTRACT FROM PUBLISHER]

The control loop stability in boost converters operating in continuous conduction mode has been restricted due to its nonminimum phase nature: the presence of a positive zero (right-half plane zero) in the control to output voltage transfer function. This paper proposes a method to mitigate the effect of the zero on the control loop by shifting the position of the zero to the left-half plane and hence leading to increased stability for the control loop of the boost converter. Superior performance of the proposed method has been clearly demonstrated using simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a solution for the voltage balance problem of the series-connected devices that can be applied to multilevel converters in which the series-connected devices need to block twice their switched voltage. The solution is based on two ideas, the control of the switching commands to achieve proper switching losses balance and the use of additional circuitry to achieve proper voltage balance during their blocking state. The proposed strategy is experimentally validated into a 5-level multipoint clamped full-scale converter. However, it can be used in any other converter topology in which the devices need to block twice their switched voltage. [ABSTRACT FROM PUBLISHER]

A modified scheme for reactive power compensation using static VAr compensators (SVCs) has been proposed in this paper for unbalanced four-wire system. The conventional SVC-based scheme requires both delta ( $\Delta $ $)$ - and star (Y)-connected SVCs for the same purpose. The proposed scheme uses a single-equivalent delta-connected thyristor controlled reactor (TCR) along with a combination of Y- and $\Delta $- connected thyristor switched capacitors for this purpose. The single-equivalent $\Delta $ -TCR in the present scheme is the result of a virtual Y-TCR and the conventional $\Delta $-TCR. This can reduces effective number of switching devices, cost, complexity, and space requirement compared to the conventional SVC-based schemes. Moreover, the proposed scheme can have various advantageous features compared to newly used DSTATCOM. The proposed scheme can also prevent injection of triplen harmonics in to the line, which is injected by Y-TCR in the conventional scheme. An optimized switching function is adopted in the proposed scheme for reduction of additional injected harmonics by TCR. The optimized switching angles are computed offline using gravitational search algorithm and stored in the processor memory for online application. The viability of the proposed scheme is simulated using MATLAB/Simulink and verified by suitable experimental results on a practical system. [ABSTRACT FROM AUTHOR]

In this paper, a novel four-way microstrip lumped-element reconfigurable dual-mode filtering power divider (FPD) is proposed. The two operating states are a four-way FPD with constant return loss, and a stopband filter (SBF) with high isolation, respectively. This switchless two operating states can be switched by selecting appropriate voltage without using switches. The tunable filtering response of four-way FPD based on a novel coupling scheme is realized by two pairs of varactor-tuned LC resonators. The measured four-way FPD can be tuned from 0.98 to 2.08 GHz with return loss better than 18 dB. Its frequency tuning range (FTR) is 72%. The measured isolation is better than 19.5 dB from dc to 5.7 GHz. Apart from the bandpass FPD application, the proposed circuit can also be utilized as an SBF, which is different that of conventional SBF by tuning off diodes to obtain isolation. By staggering the resonant frequencies of four lumped-element resonators and decrease mutual coupling between resonators, an SBF with high isolation can be obtained between two nonadjacent ports. The measured isolation is better than 40 dB from dc to 6 GHz and better than 45 dB from 1.1 to 4.8 GHz. The proposed four-way reconfigurable dual-mode FPD exhibits wide isolation bandwidth and FTR, good return loss, high isolation level, and compact size. [ABSTRACT FROM PUBLISHER]

This paper describes the development of a new buck cascaded buck–boost power factor correction (PFC) converter of 2 kW with a soft-switching technique. For its wide range of input voltage, it operates in both buck and boost modes. The parameters are properly selected to endure voltage and current stress in all operating ranges. In addition, the electromagnetic interference (EMI) filter is used to reduce the EMI noise and guarantee continuous input current in buck operation. Moreover, the zero-voltage-transient pulse-width-modulation (ZVT-PWM) method is applied to improve the overall efficiency of the converter. The performance of the proposed PFC converter with the widest range of input voltage is evaluated by the hardware experimental test including harmonics analysis based on the International Electrotechnical Commission standard in all operating ranges. Also, the variations of power factor are theoretically analyzed in both buck and boost modes to determine the widest input range of the proposed PFC converter of 2 kW with an EMI filter. These are strongly required to commercialize it in practice. Finally, the efficiency of proposed PFC converter is compared with that of a conventional buck cascaded buck–boost PFC converter under various conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a soft-switching topology is proposed for the bidirectional dc–dc converter. In order to achieve soft-switching conditions, the auxiliary circuits including a small inductor and two capacitors are introduced to the bidirectional dc–dc converter. By generating and keeping a recycle current in the auxiliary circuits, the proposed topology can provide soft-switching conditions for both switches of the bidirectional dc–dc converter in fixed frequency control application. Meanwhile, no auxiliary switches are introduced. Due to the existence of the auxiliary circuits, the proposed topology can also reduce the current ripple in the main inductor. Based on this soft-switching method, a family of bidirectional soft-switching dc–dc topologies is derived. These topologies have the similar structures and the same characteristics. The topology deduction, operating principles, and design guidelines are presented in detail. Finally, an experimental prototype is built to verify the analysis and characteristics of the proposed topologies. [ABSTRACT FROM PUBLISHER]

This paper proposes an isolated single-ended primary-inductor converter (SEPIC) dc–dc converter with ripple-free input current and lossless snubber. The proposed converter is based on a conventional isolated SEPIC converter to enable electrical isolation and high voltage gain using a coupled inductor. The input current ripple is significantly reduced by utilizing an auxiliary circuit that also functions as a lossless snubber circuit with an additional diode. Moreover, the maximum switch voltage stress is clamped to a low voltage by the snubber circuit. Therefore, a low voltage rating mosfet that has low $R_{{\rm{DS(on)}}}$ can be utilized as a main switch device. Hence, the total power efficiency is improved. Experimental results from a 100 W prototype, which are presented to verify the theoretic analysis and performance of the proposed converter. [ABSTRACT FROM PUBLISHER]

Reliable operation of dc–dc converters is vital for many applications. An appropriate converter monitoring scheme is required for fault detection and adoption of effective remedial strategies. Switch faults and degradation of electrolytic capacitor account for a considerable portion of the converter failures. Although rate of diode failures is not remarkable, power switch may be damaged in case of diode fault occurrence. Furthermore, for applications in which a redundant switch is employed as a remedy, it will be also endangered by diode failures if diode fault detection has not been considered in the monitoring scheme. Therefore, diode condition monitoring improves reliability of the converter monitoring approaches. This paper presents a simple diagnosis technique for open-circuit and short-circuit faults of the switch and diode in nonisolated dc–dc converters. The technique only employs diode voltage as the detection signature. The diode voltage and gate driver signal are processed in a simple logic circuit to generate some indicators for switch and diode fault diagnosis. Basis of the technique is discussed in detail. Several experiments have been carried out on buck, boost, and buck–boost converters. The results confirm the technique capability for switch and diode fault diagnosis in less than one switching cycle. [ABSTRACT FROM PUBLISHER]

Conventional hysteresis-modulation-based sliding-mode (SM) controller exhibits a varying switching frequency. Existing SM controllers for achieving constant-switching-frequency operation often have complicated structures and/or are less straightforward to design to meet different steady state, transient, and loading requirements. In this paper, a new direct SM voltage controller based on parabolic modulation (PM) is proposed and applied to a buck converter. The objective is to achieve constant-switching-frequency operation of a switching converter with simple control structure and good operating performance. Both theoretical study and experimental work on a buck converter show that the proposed PM-based SM control can achieve 1) constant switching frequency in the continuous-conduction mode (CCM) and quasi-constant switching frequency in the discontinuous-conduction mode (DCM) of operation, 2) inherent input-disturbances rejection and superior reference tracking performance, and 3) seamless mode transition between CCM and DCM. [ABSTRACT FROM PUBLISHER]

Hybrid switches configured by paralleling Silicon (Si) Insulated Gate Bipolar Transistors (IGBT) and Silicon Carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistors (MOSFET) have been verified to be a high-efficiency cost-effective device concept. In this paper, a current-dependent switching strategy is introduced and implemented to further improve the performance of Si/SiC hybrid switches. This proposed switching strategy is based on a comprehensive consideration of reducing device losses, reliable operation, and overload capability. Based on the utilization of such Si/SiC hybrid switches and the proposed switching strategy, a 15-kW single-phase H-bridge inverter prototype was implemented and tested in the laboratory. Simulation and experimental results are given to verify the performance of the hybrid switches and the new switching strategy. [ABSTRACT FROM PUBLISHER]

High di/dt and dv/dt of SiC MOSFET cause a considerable amount of overshoot in device voltage and current during switching transients in the presence of inverter layout parasitic inductance and load parasitic capacitance. The excessive overshoots in device voltage and current cause failure of the device. Moreover, these uncontrolled overshoots increase the switching loss in the inverter. It is difficult to reduce parasitic inductance beyond a certain point. This paper proposes an active gate driving technique, which allows inverter to operate with moderate amount of layout parasitic inductance and load parasitic capacitance. The proposed technique dramatically reduces switching loss of the SiC MOSFET with the help of existing parasitic elements. The proposed switching loss reduction technique is termed as quasi zero switching. The developed active gate driver has been tested in a double pulse test setup and a 10 kW two-level voltage source inverter driving an induction motor. [ABSTRACT FROM PUBLISHER]

Under the weaker conditions on system power and nonlinear functions, this paper focuses on the robust adaptive state constraint control for a class of uncertain switched high-order nonlinear systems. With the help of $p$-times differentiable unbounded function, a robust adaptive state-feedback controller is designed by combining the homogeneous domination approach with parameter separation principle. When the initial condition satisfies a suitable requirement, it is shown that all signals of the closed-loop system are bounded and system state is within a prespecified limit range by the proposed controller. As a practical application, the design scheme is utilized to the continuous stirred tank reactor with two modes feed stream. To further demonstrate the efficiency of the proposed controller, another numerical example is given. [ABSTRACT FROM PUBLISHER]

In this paper, a new type of matrix converter (MC) also called a single-phase high-frequency transformer isolated (HFTI) buck MC is proposed. The proposed converter can provide step-down operation of the input voltage with various types of output voltages such as in-phase and out-of-phase output voltages, rectified (or positive) output voltage, and output voltage with step-changed frequency. By incorporating HFT isolation, the proposed MC saves an extra bulky line frequency transformer, which is required for the conventional MCs to provide electrical isolation and safety, when used in application such as dynamic voltage restorers, etc. Two different circuit variations of the proposed HFTI MC are presented with and without continuous output currents, with the latter having less passive components. The safe-commutation strategy is also employed for the proposed HFTI MC to provide current path for the inductor during dead-time, which avoids switch voltage spikes without adding any snubber circuits. The operation principle and circuit analysis of the proposed MC are presented, and switching strategies are also developed to obtain various output voltages. Moreover, a prototype of the proposed MC is fabricated, and experiments are performed to produce in-phase/out-of-phase and rectified output voltages, and output voltage with step-changed frequency. [ABSTRACT FROM PUBLISHER]