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Modular multilevel converter (MMC) has become a promising topology applied in medium/high-voltage applications due to its advantages. However, there are several challenges in the MMC, such as the appearance of harmonic circulating current. In this paper, a novel two-stage model predictive control (TSMPC) is proposed to suppress the harmonic circulating current. First, the mathematical model of the MMC is discretized to describe steady-state objectives including output currents, circulating currents, summation, and imbalance of capacitor voltages. Then, an optimal control options set consisting of inserted numbers is built by the front stage of TSMPC, while the inserted number applied to the MMC ultimately is selected from the above-mentioned set by the back stage of TSMPC. The proposed TSMPC can not only improve the control performance of harmonic circulating current but also ensure the overall control performance of the MMC system. In addition, a simplified rolling optimization method is proposed to reduce computation from the aspect of simplifying each control option prediction. An optimized search space method is also proposed to design the control options set to be evaluated from the aspect of ensuring the output current tracking and harmonic circulating current suppression. Finally, the effectiveness of the proposed method is validated by experiment results. [ABSTRACT FROM AUTHOR]

For dc–ac modular multilevel converters (MMCs) in double-star configuration, this paper proposes a fast closed-loop control method based on optimized pulse patterns (OPPs). Thanks to the direct manipulation of the OPP switching instants, OPPs with discontinuous switching angles can be used, and the intrinsic cell capacitor voltage ripple is compensated for to preserve the OPPs’ superior harmonic performance. This model predictive pulse pattern controller is combined with a fast acting dead-beat circulating current controller and linked to an upper layer voltage balancing control scheme. The proposed control and modulation method is particularly suitable for medium voltage MMCs with a low number of cells. Despite operation at very low switching frequencies close to and including the fundamental frequency, a superior harmonic performance can be achieved. [ABSTRACT FROM AUTHOR]

Microinverters operating into the single-phase grid from new energy source with low-voltage output face the challenges of efficiency bottleneck and twice-line-frequency variation. This paper proposed a multilevel inverter based on bridge modular switched-capacitor (BMSC) circuits with its superiority in conversion efficiency and power density. The topology is composed of dc–dc and dc–ac stages with independent control for each stage, aiming to improve system stability and simplify the control method. The BMSC dc–dc stage, which can be expanded to synthesize more levels, not only features multilevel voltage gain but also partially replaces the original bulk input capacitor and functions as an active energy buffer to enhance power-decoupling ability between dc and ac sides. In dc–ac stage, the control strategy of optimized unipolar frequency doubling sine-wave pulse width modulation is proposed to improve the quality of output waveform. Meanwhile, the multilevel voltage phase has been optimized to further reduce the power loss. Finally, a prototype has been built and tested. Associated with the simulation, the experimental results validate the practicability of these analyses. [ABSTRACT FROM PUBLISHER]

Filters for switching ripple attenuation are essential at the input, and sometimes at the output for certain applications, for the deployment of matrix converters (MCs). Due to the absence of inertial elements in the MC structure and the consequent tight input–output coupling, the filter parameters significantly affect its dynamic behavior. This paper presents an exhaustive filter design method for synchronous applications of the MC in power systems. Apart from the usual considerations of ripple attenuation, voltage regulation, reactive current loading, and internal losses, this paper also addresses additional constraints which may be imposed by requirements of dynamic performance and reliable commutation. Rigorous analytical justification of each design step is provided and the sequential design process is summarized. Relevant experimental results are presented to validate the proposed design tool. [ABSTRACT FROM PUBLISHER]

This paper proposes a multiloop framework for current control of grid-connected voltage source inverters (VSIs) with LCL output filter. The discrete-time model is of third-order with a nonminimum phase zero when controlling the grid side current. This poses some difficulties on the design of most types of controllers. Motivated by this problem, the inner loop is implemented by a discrete-time sliding mode control law to ensure the tracking of the converter side current. This can be achieved regardless the grid impedance and voltage, making the converter to behave like a current source inverter with a capacitive+inductive (CL) filter. Thus, the problem of current control falls from a third-order system to a second-order system. Several types of controllers can be designed to implement the outer loop based on the equivalent CL circuit. In this work, a resonant controller with a virtual resistor was applied. Simulations and experimental results are presented to validate the proposal. [ABSTRACT FROM PUBLISHER]

This paper presents the design and implementation of a simple neutral point potential (NPP) regulator for a three-level diode-clamped inverter employing a sine-triangle regulator in conjunction with a closed-loop controller with reduced switching losses. The regulator principle is based on adding a continuous variable offset voltage which regulates the midpoint potential of the dc bus. The novelty of the proposed NPP regulator is in the determination of the magnitude of variable offset voltage based upon the average value, peak-to-peak amplitude, total harmonic distortions, and third harmonic content in NPP. Aside from maintaining dc-bus voltage balance, the proposed regulator leads to a significant reduction in the voltage distortion at the NP, resulting in the reduction of the required dc-bus capacitance. It also reduces the switching losses of the inverter by inserting the “no-switching” zone within each half cycle of the fundamental voltage wave. Analytical, computer simulation, and experimental results verifying the approach are presented in this paper for various load power factor angles. [ABSTRACT FROM AUTHOR]

In this paper, the near-state pulse width modulation (NSPWM), adapted to be used in dual-voltage source inverter (VSI) fed open-end load, is introduced primarily aiming to appreciably minimize the voltage total harmonic distortion (THD). Within the framework of the proposed method, the active time of pulses at the second inverter is relatively adjusted within switching interval (compared to the first VSI). The phase voltage harmonics are formulated for dual-inverter modulated by NSPWM; then, optimal adjustment is identified via a three-dimensional curve of phase voltage THD versus modulation index (MI) and phase angle displacement (PAD). Due to the limitation of MI in NSPWM, the desired output voltage is synthesized with modifying not only MI but also PAD between references of two VSIs. Furthermore, NSPWM inherently takes advantage of better efficiency compared to conventional space vector modulation due to switching only two phases within an interval (by clamping one phase to positive/negative dc-rail). The dual-VSI supplied by two isolated dc sources is assembled in the laboratory to experimentally evaluate the THD reduction feature of the proposed method; also, the simulation results obtained by means of a MATLAB/Simulink environment show close agreement with experimental data. [ABSTRACT FROM PUBLISHER]

This paper proposes a new configuration for static ground power unit (GPU) based on the novel 25-level hybrid active neutral-point-clamped (HANPC) converter. The superiority of the proposed converter, as compared with conventional and other suggested multilevel converters, is significant decreasing the number of switches and minimizing the number of flying capacitors (FC) in converter. This improvement is possible by using suggested low-voltage submodule converter to the ANPC converter and proposed modulation method. This results in reduction of the size and cost of converter and makes it more feasible and reliable. Applying the active voltage balancing method for FC in the proposed HANPC converter guaranties fast charging and voltage-level regulation of FC without using balance booster circuit. Improving output voltage spectrum leads to inductance reduction of output L–C filter which enhances static GPU performance. The simulation and experimental results verify the validity and feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents a new family of buck type power factor corrector rectifiers that operates in continuous-conduction mode (CCM) and generates a multilevel voltage waveform at the input. Due to CCM operation, commonly used ac-side capacitive filter and dc-side inductive filter are removed from the proposed modified packed U-cell rectifier structure. Dual dc output terminals are provided to have a five-level voltage waveform at the input points of the rectifier where it is supplied by a grid via a line inductor. Producing different voltage levels reduces the voltage harmonics which affects the grid current harmonic contents directly. Low switching frequency of the proposed rectifier is a distinguished characteristic among other buck type rectifiers that reduces switching losses and any high switching frequency related issues, significantly. The proposed transformerless, reduced filter, and multilevel rectifier topology has been investigated experimentally to validate the good dynamic performance in generating and regulating dual 125-V dc outputs terminals as telecommunication boards feeders or industrial battery chargers under various situation including change in the loads and change in the main grid voltage amplitude. [ABSTRACT FROM PUBLISHER]

Phase-shifted carrier modulation is an industry standard in its application to multilevel H-bridge converters. The major advantage of this scheme over level-shifted and space vector modulation schemes is its inherent ability to evenly distribute losses between semiconductor devices. However, phase-shifted schemes suffer from harmonic degradation when operated at the low carrier frequencies required in high-power high-level number applications. This paper develops a model predictive modulation (MPM) scheme that achieves superior harmonic performance, compared to phase-shifted modulation, while ensuring equal semiconductor loss distribution. With respect to complete-enumeration-based predictive techniques, the proposed modulation significantly reduces the number of times the system cost function is evaluated. Reducing the number of calculations by several orders of magnitude ensures computational feasibility. Simulation and experimental results are presented, which confirm correct operation of the modulation strategy. [ABSTRACT FROM PUBLISHER]

Multilevel power electronic converters have gained popularity in high-power applications due to their lower switch voltage stress and modularity. Cascaded H-bridge converters are a promising breed of multilevel converters which generally require several separate dc voltage sources. By utilizing the redundant switching states, it is possible to replace the separate dc voltage sources with capacitors and keep only the one with the highest voltage level. Redundancy in the charge and discharge modes of the capacitors is assumed to be adequate for their voltage regulation. However, the effects of the output current of the converter as well as the time duration of the redundant switching states have been neglected. In this paper, the impacts of the connected load to the cascaded H-bridge converter as well as the switching angles on the voltage regulation of the capacitors are studied. This paper proves that voltage regulation is only attainable in a much limited operating conditions that it was originally reported. In addition, based on the analysis of the converter, a simplified formula is found which can be used to find those modulation indices that regulate the voltage of the capacitor. This formula can be used in harmonic minimization problems while capacitor voltage regulation is ensured. Simulation and laboratory results are provided to confirm the analysis. [ABSTRACT FROM PUBLISHER]

Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc–dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter. [ABSTRACT FROM PUBLISHER]

The circulating current in phase legs is an inherent phenomenon of modular multilevel converters (MMCs). The circulating current affects various aspects of MMC performance, such as power losses, capacitor voltage ripples, and the required current rating of semiconductors. Existing circulating current control methods can improve MMC performance in one aspect, but they may not implement the optimal performance in various aspects. Analytically analyzing how circulating current control affects MMC performance is essential. This paper proposes an improved steady-state analysis method that considers circulating current control. The influence of circulating current control is included by considering the effects of the second-harmonic component on reference voltages. Explicit analytical expressions for various electrical quantities can be derived, and the analytical calculation curves of some MMC performance indexes concerned under varying second-harmonic reference voltages can be obtained. Accordingly, the effects of circulating current control on MMC performance can be concluded, where a theoretical foundation for the accurate design of MMC parameters is provided. In addition, the obtained analytical calculation curves can be used to evaluate different circulating current control targets and find appropriate control targets to comprehensively improve MMC performance. Both simulation and experimental results verify the validity of the proposed steady-state analysis method and the corresponding conclusions. [ABSTRACT FROM PUBLISHER]

Phase-shifted carrier modulation is an industry standard in its application to multilevel H-bridge converters. The major advantage of this scheme over level-shifted and space vector modulation schemes is its inherent ability to evenly distribute losses between semiconductor devices. However, until now, its implementation has necessitated a capacitor voltage balancing scheme that degrades converter harmonic performance. This paper develops two phase-shifted carrier modulation schemes that avoid harmonic degradation by exploiting an extra degree of freedom in the available switching states. Simulation and experimental results are presented that confirm the correct operation of the modulation strategies. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) becomes attractive for high-voltage and high-power applications due to its high modularity, availability, and power quality. The voltage balance issue of capacitors is very important in the MMC, and balancing of the capacitor voltage is increasingly difficult as the switching frequency is reduced. In this paper, a voltage-balancing method is proposed for the MMC switched at grid frequency with reduced losses and does not rely on the arm current. By assigning the low-frequency pulses with different pulsewidths, the capacitor charge transfer in the MMC can be controlled for keeping the capacitor voltage balancing in the MMC. Simulations and experimental studies of the MMC are conducted, and the results confirm the effectiveness of the proposed capacitor voltage-balancing method. [ABSTRACT FROM PUBLISHER]

This paper presents input-series–output-parallel (ISOP) configuration for single-phase front-end buck rectifiers (BRs). The configuration is especially suitable for traction applications, where the complete rectification system needs to withstand high ac voltages and supply medium-power loads. The primary rectification module of the proposed configuration is based on pulsewidth-modulated BR (current source inverter topology). The desired isolation, mandatory for ISOP connection, is provided at the dc stage through a medium-frequency/high-frequency transformer. Equal power sharing by modules is achieved from the ac side through input voltage and current sharing. The proposed control scheme is configured using two loops. While the outer loop regulates the output dc voltage and active wave shaping of the source current, the inner loop ensures stable voltage sharing. The performance of the proposed ISOP configuration is verified using numerical simulation. Experimental verification is achieved through a 2-kW grid-connected laboratory prototype. [ABSTRACT FROM PUBLISHER]

Loads connected to a stiff source cannot be protected from voltage disturbances using a distribution static compensator (DSTATCOM). In this paper, a new control-algorithm-based multifunctional DSTATCOM is proposed to operate in voltage control mode under stiff source. This scheme provides fast voltage regulation at the load terminal during voltage disturbances and protects critical loads. In addition, during normal operation, the generated reference load voltages allow control of the source currents. Consequently, DSTATCOM injects reactive and harmonic components of load currents to make source power factor unity. Simulation and experimental results are presented to verify the efficacy of the proposed control algorithm and multifunctional DSTATCOM. [ABSTRACT FROM PUBLISHER]

This paper presents the hybrid seven-level cascaded active neutral-point-clamped (ANPC)-based multilevel converter. The converter topology is the cascaded connection of a three-level ANPC converter and an H-bridge per phase. The voltage of the H-bridge is actively maintained to the required level through selection of the switching states of the converter. The topology is operated under selective harmonic elimination pulsewidth modulation (SHE-PWM), maintaining the switching frequency of the converter to a minimum. The operating principles, voltage balancing methods, and limitations of the converter are analyzed together with extensive simulation results of the topology. Experimental results from a low-power laboratory prototype are presented that verify the operation of the hybrid converter under SHE-PWM. [ABSTRACT FROM PUBLISHER]

This paper presents the modeling and control processes of the single-phase cascade H-bridge multilevel converter used as a shunt active filter. Based on the obtained model, a controller is proposed to compensate for harmonic distortion and reactive power caused by a nonlinear load. These issues are solved by guaranteeing tracking of the line current toward an appropriately defined current reference. In the proposed approach, the current reference has been selected to be a signal proportional to either the line voltage or to its fundamental component; however, the proposed method can also be extended to other reference definitions. The proposed controller also includes voltage loops to guarantee regulation and balance of the involved capacitor voltages toward constant references. Experimental results on a 2-kVA prototype are presented to assess the performance of the proposed controller. [ABSTRACT FROM PUBLISHER]

Cascaded H-bridge multilevel power electronic converters generally require several dc sources. An alternative option is to replace all the separate dc sources feeding the H-bridge cells with capacitors, leaving only one H-bridge cell with a real dc voltage source. This will yield a cost-effective converter. However, the required capacitor voltage balancing is challenging. In this paper, using the phase-shift modulation approach, a new control method for cascaded H-bridge multilevel converters fed with only one independent dc source is presented. The proposed method has a wide voltage regulation range for the replacement capacitors in the H-bridge cells. Experimental and simulation results support the proposed control method. [ABSTRACT FROM PUBLISHER]

With the rapid development of high-speed and high-power railway system in China, power quality such as the negative sequence current and harmonic current caused by electric locomotives becomes more and more critical. This paper proposes a half-bridge-converter-based railway static power conditioner (RPC) (HBRPC) which consists of two half-bridge converters connected by two capacitors in series. Compared with the traditional RPC, the HBRPC requires only a pair of power switch legs and two capacitors. Under the premise of accomplishing the same function of RPC, the proposed conditioner can reduce half of the power switches, which can make it with lower cost and hardware complexity. A double-loop control is proposed for HBRPC to keep the dc-link voltage stable and achieve the dynamic tracking of the current reference signals, while a balanced voltage control is proposed to eliminate the error of two capacitor voltages and maintain the normal operation of HBRPC. Finally, simulation and experiment results have verified the proposed structure and its control method effectively. [ABSTRACT FROM PUBLISHER]

A five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter is an arrangement of a three-level ANPC converter and a two-level cell. In this paper, a control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polarity of the FC voltage, and the polarity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation. The voltage across the FCs and the dc-link capacitors are simultaneously controlled at their reference voltage levels. The proposed control strategy is applied using power system computer aided design/electromagnetic transients including dc on a static synchronous compensator operating under a power-factor-correction mode to verify its performance. Experimental results are also presented for low and high number of angles per quarter period using a low-power laboratory prototype. [ABSTRACT FROM AUTHOR]