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In this paper, a predictive control scheme is proposed for the low-voltage ride-through (LVRT) enhancement of direct-driven permanent-magnet-synchronous-generator-based megawatt-level wind turbines. The proposed method uses the turbine–generator rotor inertia to store the surplus energy during the grid voltage dips. The power conversion system is realized using a three-phase diode-bridge rectifier, a three-level-boost converter, and a neutral-point-clamped (NPC) inverter. The wind turbine requirements, such as maximum power point tracking, net dc-bus voltage control, balancing of the dc capacitor voltages, and reactive power generation, are modeled as the reference control variables. The generator- and grid-side cost functions are defined to deal with these control objectives. During each sampling interval, the control goals are achieved based on the minimization of cost functions. The coordination of boost and NPC converters and the exchange of reference control variables during normal and LVRT operation are formulated such that the power converters operate in a safe mode while meeting the grid code requirements. Simulation and experimental results are presented to validate the proposed strategy. [ABSTRACT FROM PUBLISHER]

In this paper, novel topologies for symmetric, asymmetric, and cascade switched-diode multilevel converter are proposed, which can produce many levels with minimum number of power electronic switches, gate driver circuits, power diodes, and dc voltage sources. The number of required power electronic switches against required voltage levels is a very important factor in designing of multilevel converter, because switches define the reliability, circuit size, cost, installation area, and control complexity. For asymmetric and cascade converter, new algorithms for determination of dc voltage sources values are presented. To produce maximum number of levels at the output voltage, the proposed cascade topology is optimized for different goals, such as the minimization of the number of power electronic switches, gate driver circuits, power diodes, dc voltage sources, and blocking voltage on switches. Comparison of the results of various multilevel converters will be investigated to reflect the merits of the presented topologies. The operations of the proposed multilevel converters have been analyzed with the experimental and simulation results for different topologies. Verification of the analytical results is done using MATLAB simulation. [ABSTRACT FROM PUBLISHER]

This paper presents a novel direct current-fed interleaved phase-modulated single-phase unfolding inverter for fuel-cell applications. Two active-clamped zero-voltage switching current-fed half-bridge isolated converters are interleaved in parallel input and series output configuration. Phase modulation is proposed to control these two converter cells, which generate a rectified sinusoidal pattern at the dc link. A simple H-bridge unfolding dc–ac inversion is used to produce single-phase sine voltage at line frequency switching using square-wave control. This not only simplifies the inversion stage in terms of modulation but also reduces the switching losses. Direct front-end current-fed based unfolding inverter is not reported in literature yet. Detailed analysis and design of the proposed direct current-fed single-phase unfolding inverter has been presented. Simulation waveforms using PSIM 9.0.4 are given to verify the presented analysis and design. Experimental results on a laboratory prototype rated at 200 W are demonstrated to support the investigation, to validate the accuracy of the proposed analysis and design, and to test the performance. [ABSTRACT FROM PUBLISHER]

In this paper, a high-conversion-ratio bidirectional dc–dc converter with coupled inductor is proposed. In the boost mode, two capacitors are parallel charged and series discharged by the coupled inductor. Thus, high step-up voltage gain can be achieved with an appropriate duty ratio. The voltage stress on the main switch is reduced by a passive clamp circuit. Therefore, the low resistance R{DS(ON)} of the main switch can be adopted to reduce conduction loss. In the buck mode, two capacitors are series charged and parallel discharged by the coupled inductor. The bidirectional converter can have high step-down gain. Aside from that, all of the switches achieve zero voltage-switching turn-on, and the switching loss can be improved. Due to two active clamp circuits, the energy of the leakage inductor of the coupled inductor is recycled. The efficiency can be further improved. The operating principle and the steady-state analyses of the voltage gain are discussed. Finally, a 24-V-input-voltage, 400-V-output-voltage, and 200-W-output-power prototype circuit is implemented in the laboratory to verify the performance. [ABSTRACT FROM PUBLISHER]

The pulse-train (PT) control technique for switching dc–dc converters is simple to design and benefits from excellent control performance. Up to now, almost all of the works on PT control are focused on switching dc–dc converters operating in discontinuous conduction mode, with few works reported on PT control of switching dc–dc converters operating in continuous conduction mode (CCM). In this paper, a PT-controlled CCM buck converter is studied and a unique low-frequency oscillation phenomenon is revealed, which results in large undesired inductor-current and output-voltage variations. The effect of equivalent series resistance (ESR) output-capacitor on the low-frequency oscillation is examined. The results indicate that such oscillation occurs when the ESR output-capacitor is relatively small and disappears when it is relatively large. However, a larger ESR will result in a large output-voltage ripple. In order to avoid the low-frequency oscillation and, at the same time, to ensure a small output-voltage ripple, the ICRIF circuit is applied. In this way, a small ESR output-capacitor can be used to decrease the output-voltage ripple. Simulation and experimental results are provided to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

The five-level active neutral-point (NP)-clamped (ANPC) converter is a newly emerging topology which can overcome the drawbacks of traditional NP-clamped and flying-capacitor multilevel converters. This paper presents a comprehensive theoretical analysis of the NP potential balancing issue and demonstrates that the NP potential can be naturally balanced under ideal and steady conditions. An NP potential balancing method based on zero-sequence voltage injection is presented. By calculating the average NP currents of all key zero-sequence voltages, the most appropriate zero-sequence voltage is selected to generate the demanded NP current, which can also limit the switching frequency of the series-connected insulated-gate bipolar transistors to the fundamental frequency. A three-phase five-level ANPC inverter prototype is built up, and both steady and dynamic experimental results are presented to verify the validity of this method. [ABSTRACT FROM PUBLISHER]

Equivalent series resistance (ESR) of output capacitor has a significant effect on the control performance of constant on-time (COT) controlled switching dc-dc converters. In this paper, a discrete-time model of COT-controlled buck converter, with variable sampling frequency, is established. Based upon which, the dynamical effects of the ESR of output capacitor on COT-controlled buck converter are revealed and analyzed. The time-domain numerical simulations of the exact switched state equations, the bifurcation diagrams, and maximal Lyapunov exponents of the discrete-time model are obtained. These results verified by experimental circuit indicate that the ESR of output capacitor is a critical factor for COT-controlled buck converter, which can eliminate the unique pulse bursting phenomenon and shift operation mode from discontinuous conduction mode to continuous conduction mode, as well as control stability. [ABSTRACT FROM PUBLISHER]

In this paper, two reduced switch count topologies are introduced for independently supplying two single-phase ac loads with one inverter. Using a new three-switch leg structure recently introduced and implemented in three-phase converters, two types of dual-leg and single-leg topologies are developed which respectively are functionally comparable to two full-bridge and half-bridge inverters working independently though with a less number of semiconductor switches and hence control and gate drive circuit components. The proposed six-switch and three-switch topologies are introduced; two modes of equal frequency and different frequency operation each of its own distinctive characteristics are considered for them and their pulse width modulation schemes are elaborated. Comprehensive analyses of power loss profile and output waveform properties are conducted via simulation for the proposed inverters, and the results are compared with full-bridge and half-bridge inverters. To assess the performance of the proposed inverter topologies, working prototypes are built, and the experimental results are provided. [ABSTRACT FROM PUBLISHER]

Multilevel inverters have been widely accepted for high-power high-voltage applications. Their performance is highly superior to that of conventional two-level inverters due to reduced harmonic distortion, lower electromagnetic interference, and higher dc link voltages. However, it has some disadvantages such as increased number of components, complex pulsewidth modulation control method, and voltage-balancing problem. In this paper, a new topology with a reversing-voltage component is proposed to improve the multilevel performance by compensating the disadvantages mentioned. This topology requires fewer components compared to existing inverters (particularly in higher levels) and requires fewer carrier signals and gate drives. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels. Finally, a prototype of the seven-level proposed topology is built and tested to show the performance of the inverter by experimental results. [ABSTRACT FROM PUBLISHER]

This paper is devoted to the step-up dc/dc converter family with a cascaded quasi-Z-source network (qZS-network). The cascaded (two-stage) qZS-network could be derived by the adding of one diode, one inductor, and two capacitors to the traditional quasi-Z-source inverter (qZSI). The proposed cascaded qZSI inherits all the advantages of the traditional solution (voltage boost and buck functions in a single stage, continuous input current, and improved reliability). Moreover, as compared to the conventional qZSI, the proposed solution reduces the shoot-through duty cycle by over 30% at the same voltage boost factor. Theoretical analysis of the two-stage qZSI in the shoot-through and non-shoot-through operating modes is described. The proposed and traditional qZS-networks are compared. A prototype of a step-up dc/dc converter with the cascaded qZS-network was built to verify the theoretical assumptions. The experimental results are presented and analyzed. Finally, a further optimization method of the cascaded qZS-network is proposed, and some practical design issues are discussed. [ABSTRACT FROM PUBLISHER]

In this paper, two space-vector-based pulsewidth modulation (PWM) (SVPWM) strategies named equal- and proportional-duty SVPWMs are described, which are used to synthesize a four-level waveform from an open-end winding configuration of an induction motor. Two isolated dc-link voltages, which are in the ratio of 2 : 1, are employed to achieve this objective. Both of these PWM strategies achieve the avoidance of overcharging of the dc-link capacitor of an inverter operating with lower dc-link voltage by its counterpart with higher dc-link voltage. Implementation of these PWM strategies requires only the instantaneous three-phase reference voltages, eliminating the need of sector identification or lookup tables. The numbers of samples per cycle for individual inverters are selected in such a way that the quarter-wave, half-wave, and three-phase symmetries are achieved for the dual-inverter drive despite unequal dc-link voltages for the constituent inverters. It is also shown that one of the two PWM techniques, called the proportional-duty SVPWM, results in a better spectral performance and lower switching power loss in the overall dual-inverter system compared to the equal-duty SVPWM. [ABSTRACT FROM PUBLISHER]

An active-clamp forward (ACF) converter, which is popular in low-to-medium power applications, suffers from the high-voltage stress on switches, i.e., the sum of input voltage and reset capacitor voltage. To relieve this problem, a two-switch (2-SW) ACF converter, where the voltage stresses on the main switches are clamped to either the input voltage or the reset capacitor voltage by simply employing one clamping diode and a delayed turnoff gate signal, is proposed in this paper. Therefore, in view of utilizing high-performance low-voltage switches, the proposed 2-SW ACF converter can be promising for high-input-voltage applications. [ABSTRACT FROM AUTHOR]

A five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter is an arrangement of a three-level ANPC converter and a two-level cell. In this paper, a control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polarity of the FC voltage, and the polarity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation. The voltage across the FCs and the dc-link capacitors are simultaneously controlled at their reference voltage levels. The proposed control strategy is applied using power system computer aided design/electromagnetic transients including dc on a static synchronous compensator operating under a power-factor-correction mode to verify its performance. Experimental results are also presented for low and high number of angles per quarter period using a low-power laboratory prototype. [ABSTRACT FROM AUTHOR]

With regard to a five-level inverter comprising flying-capacitor asymmetric H-bridge, the impact on the capacitor voltage under conventional modulation approach is analyzed. Since it is sensitive to the fundamental period and the load current, it may introduce undesired low-order harmonics into the output voltage and may even break down the power switches due to the considerable fluctuation of the flying-capacitor voltage. Thus, this paper proposes a novel pulsewidth-modulation scheme with the positive and negative cross carriers, which controls the flying-capacitor voltage by utilizing the redundant switching states of the output voltages. Three modes of precharging the flying capacitor without extra equipments are presented. Moreover, the capacitance of the flying capacitor and the switching frequency of the power switches can be chosen according to the allowable fluctuation of the flying-capacitor voltage and the load current. In order to remove the overlapping of the level layers, the optimization of the line-to-line voltage waveform is proposed to synthesize the reference vector with the “nearest three-vector” approach. The theory is supported by the experimental results from the prototype. [ABSTRACT FROM AUTHOR]

In this paper, a novel high step-up dc–dc converter with coupled-inductor and voltage-doubler circuits is proposed. The converter achieves high step-up voltage gain with appropriate duty ratio and low voltage stress on the power switches. Also, the energy stored in the leakage inductor of the coupled inductor can be recycled to the output. The operating principles and the steady-state analyses of the proposed converter are discussed in detail. Finally, a prototype circuit of the proposed converter is implemented in the laboratory to verify the performance of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper proposes an energy regeneration circuit for three-phase voltage-fed inverters using a modified Undeland snubber. The proposed system uses a quasi-square-wave zero voltage switching dc–dc auxiliary converter to regenerate the energy from snubber capacitor to the dc bus. The regenerative circuit uses a single active switch, and it operates independently of the three-phase inverter. Operation stages, theoretical waveforms, and a design methodology are presented. Experimental results based on a 4.5-kVA three-phase inverter prototype are included to validate the proposed topology. [ABSTRACT FROM PUBLISHER]

A high step-up conversion-ratio converter with soft switching is presented in this paper. By using both coupled inductors and isolated transformer, high voltage gain can be easily achieved without extremely high duty ratio. To deal with switching losses, the active clamping circuit is adopted to achieve the zero-voltage-switching turn-on feature for power switches and to absorb the energy stored in the leakage inductor. Moreover, the series-resonant tanks composed by leakage inductors of the transformer and resonant capacitors are used to achieve the zero-current-switching turn-off feature for rectifier diodes at the output side. Therefore, the turn-on switching loss of power switches and the reverse-recovery problem of rectifier diodes can be eliminated. The operational principles and design consideration are discussed in detail. Finally, experimental results taken from a 400-W prototype are presented to confirm the effectiveness of the proposed converter. [ABSTRACT FROM AUTHOR]

A dual resonant converter with two transformers is presented in this paper. Dual resonant tanks are composed of leakage inductors and resonant capacitors to achieve zero-current-switching turnoff for rectifier diodes at the secondary side of the transformer. Hence, the reverse-recovery problem of the rectifier diodes can be eliminated. Moreover, the active-clamp circuit does not only absorb the energy stored in the leakage inductor but also clamp the voltage stress of power switches. Compared to the conventional dual resonant converter, the zero-voltage switching operation of the proposed converter is easily achieved by using two transformers. The operation principles, design considerations, and realization are discussed in detail. Finally, experimental results from a 400-W laboratory prototype are presented to confirm the effectiveness of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper presents a new three-level topology based on the neutral-point (NP)-clamped converter. An additional leg is added to the basic topology. The main purpose of this leg is to provide the converter with fault-tolerant capabilities. In addition, during normal operation mode, the fourth leg can be used to balance the NP voltage. In this way, the low-frequency voltage oscillations that appear in the NP under some operating conditions are cancelled out effectively. As a result, the modulation strategy of the three main legs of the converter does not have to take care of the voltage balance and can focus on other aspects such as, for instance, minimizing the switching losses of the converter. However, the inclusion of the fourth leg produces some additional losses. A resonant topology is proposed to minimize the switching losses of this leg. Three different fault-tolerant solutions based on the fourth-leg topology are presented. A comparison of these topologies showing their respective advantages and drawbacks is made. Experimental results are presented to show the viability of this approach. [ABSTRACT FROM AUTHOR]

Unipolar sinusoidal pulsewidth modulation (SPWM) full-bridge inverter brings high-frequency common-mode voltage, which restricts its application in transformerless photovoltaic grid-connected inverters. In order to solve this problem, an optimized full-bridge structure with two additional switches and a capacitor divider is proposed in this paper, which guarantees that a freewheeling path is clamped to half input voltage in the freewheeling period. Sequentially, the high-frequency common-mode voltage has been avoided in the unipolar SPWM full-bridge inverter, and the output current flows through only three switches in the power processing period. In addition, a clamping branch makes the voltage stress of the added switches be equal to half input voltage. The operation and clamping modes are analyzed, and the total losses of power device of several existing topologies and proposed topology are fairly calculated. Finally, the common-mode performance of these topologies is compared by a universal prototype inverter rated at 1 kW. [ABSTRACT FROM AUTHOR]

A novel three-phase diode boost rectifier is proposed in this paper. The core of the proposed topology is a power conversion device [the loss-free transformer (LFT)] with two terminals; one input and one output. The input is parallel-connected with the dc bus capacitor, while the output is connected between the rectifier plus rail and the dc bus plus rail. The LFT is controlled in such a way to control the rectifier current and boost the dc bus voltage. In contrast to the ordinary boost rectifiers, the switches of the new boost rectifier are rated on a fraction of the dc bus voltage and a fraction of the input current. It makes this topology very compact and efficient. Power rating, size, and losses depend strongly on the ratio of the dc bus voltage to rectifier voltage (boosting factor). For example, if the boosting factor is low, below 1.5, the power converter efficiency could be 98–99%. The proposed boost rectifier has been analyzed and experimentally verified on a 5.5-kW prototype. The results are presented and discussed. [ABSTRACT FROM AUTHOR]

A newly designed zero-voltage-switching (ZVS) multi-input converter is proposed in this paper. The converter can boost the different voltages of two power sources to a stable output voltage. An auxiliary circuit is employed for achieving turn-on ZVS of all switches in the proposed converter. According to various situations, the operational states of the proposed converter can be divided into two states, including a single-power-supply and a dual-power-supply state. In the dual-power-supply state, the input circuits connected in series together with the designed pulsewidth modulation can greatly reduce the conduction loss of the switches. In addition, the effectiveness of the designed circuit topology and the ZVS properties are verified by experimental results, and the goal of high-efficiency conversion can be obtained. [ABSTRACT FROM AUTHOR]

AC voltage and phase regulators based on tap changers implemented with silicon-controlled rectifiers and triacs are widely used due to their robustness. Tap changing is achieved under natural commutation of semiconductors during the zero crossing of current, so that the response time exceeds the half cycle of the mains. High-power transistors and gate turn-off thyristor switches make new and faster tap commutation techniques possible to achieve several tap changes in one half cycle. This paper analyzes and synthesizes a dual-tap chopping stabilizer with a compensating transformer, with a pulsewidth-modulation frequency of about 5 kHz and a new soft-switching technique achieved by two auxiliary small-power branches. Unlike other supercyclic ac soft-switching solutions, the new commutating method allows zero current turn-off, several times in a half cycle, for any sign combination of voltage and current, thus reducing the electrical stress in the switches and the electromagnetic emission. Zero-crossing current detection is not needed. A technical study and an evaluation of the power of the required components are done on the commutation techniques that extend the application field of tap changers to the reduction of the fast perturbations of the mains as flicker, voltage harmonics, voltage oscillations, etc. Experimental results with insulated-gate bipolar transistor switches are obtained in a 1 kVA prototype. [ABSTRACT FROM AUTHOR]