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In photovoltaic systems, common-mode voltage (CMV) generates leakage current, which shortens the insulation lifespan and causes safety problems. As for neutral-point-clamped (NPC) inverters, zero CMV PWM (ZCMV PWM) can be implemented to eliminate leakage current, but unable to balance neutral-point (NP) voltage in dc side. This article presents a novel modulation technique for NPC PV inverter. The strategy contains ZCMV PWM and another two modulation modes which keeps CMV constant in one switching period, so as to eliminate leakage current. In order to balance NP voltage, NP current is adjusted by selection of optimal modulation mode and the leakage current is still well eliminated during the process of balancing NP voltage. Compared with conventional ZCMV PWM, the proposed scheme can remove both leakage current and NP voltage deviation. The output performance and limitations of the proposed method are also introduced in the paper. Experiments are provided to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

Due to different solar radiation, temperature, and other reasons of modules in the three-phase cascaded H-bridge (CHB) photovoltaic (PV) inverter, the output power among PV modules will be unequal and lead to unbalanced grid currents, which cannot meet the requirements of grid codes. On the other hand, the second-order voltage ripple is aroused in the dc-link capacitor since each phase-leg of the CHB inverter is made up of a single-phase inverter. Concerning these two issues, this paper proposes an optimized third harmonic injection method based on fundamental frequency zero sequence injection (FFZSI), which is a conventional method to handle the slight power imbalance problem. In this paper, the FFZSI is adopted to redistribute the power among three phases, and then the third harmonic is injected into the three-phase combined reference waveforms according to the two requirements: all modules are free from overmodulation and the dc-link voltage fluctuation is mostly reduced. Therefore, the proposed method can reduce the dc-link voltage fluctuation and extend the power balance range of FFZSI at the same time. The validity and effectiveness of the proposed method are verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a family of single-stage converters consisting of three different converters, each of which is able to produce a variety of waveforms through the waveform-subtraction technique. We brand this converter family as waveform-subtraction based single-stage converter (WSSC). By using only a single-stage converter, the proposed waveform generation technique is able to realize dc–dc–ac conversions and suppress input current ripple, meeting the needs of modernized power grid with renewable energy sources. At the same time, converters in this WSSC family are capable of generating a range of shapes, such as triangular, rectangular, and sawtooth waveforms, with simple structures, demonstrating its suitability of being applied in the electrochemical industry, e.g., in the electroplating process. Furthermore, the proposed family converters also realize substantially better input current ripple suppression compared to other conventional converters. In order to prove the validity and efficacy of the proposed WSSC and the theory underpinning it, in this paper, extensive simulations and analyses are conducted to verify the theoretical foundation of the proposed WSSC strategy, and the prototype of a converter from the proposed converter family is built and tested in our laboratory, which validates the functionality of the WSSC. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

In this paper, a new modular and active snubber cell, easily applicable, and attractive for converters, especially have many switches proposed. This snubber cell is implemented on the single phase of a grid-connected three-phase T-type three-level inverter (T-3LI). In this new converter, the main switches turn-on under zero-voltage transition and turn-off under zero-voltage switching (ZVS). Also, auxiliary switches turn-on under zero-current switching and turn-off under ZVS. All snubber diodes operate under soft switching (SS). There are no additional current and voltage stresses on the main switches. During an SS operation, the switching energies are transferred to a dc voltage source. Then, these energies are processed to input with an independent dc–dc converter. Thus, all switching energies are recycled. In this paper, the principle operation and steady-state analysis of the modular and active snubber cell for a single-phase T-3LI are presented and experimental results, rated 1 kW and 100 kHz, are provided to verify theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

In this paper, a new family of impedance source inverters is presented. It employs high-frequency electrical isolation between the inverter bridge switches and the load along with voltage clamping across the dc-link voltage. Conventional Z-source inverters (ZSIs) employs an impedance network that consists of inductors and capacitors. It has unique features that realize both step-up/step-down functions and eliminates the need of dead/overlap times. This paper extends this novel concept by using electrical isolation in impedance source inverters. High-frequency isolation has many advantages in terms of immunity and reliability; when applied with impedance source inverters this makes ZSIs a preferable choice for industrial applications. In photo-voltaic systems, the addition of the high-frequency transformer provides safety by avoiding the injection of dc circulating current into the grid, without the need of an external bulky line frequency transformer. The gain of the proposed inverter design can be accurately selected by choosing the turns ratio of the high frequency transformer (HFT) or by adjusting the shoot-through duty cycle (STDC) to the inverter. This allows for greater freedom especially when utilizing a higher modulation index, with the STDC allowing dynamic gain adjusts to be done speedily during operation of the inverter. Additionally, a dc-rail voltage clamping technique for the proposed class of isolated ZSIs is also discussed. This technique provides benefits not only in improving the output voltage quality, but also in reducing voltage stress of the active and passive components by minimizing the voltage spikes across the switching devices. In this paper, several high-frequency isolated ZSIs are presented, and an example isolated improved ΓZSI design is shown and discussed in detail. Simulations are provided for the proposed class of isolated inverters to verify their working. Further experimental investigation has been done for which results for the isolated improved ΓZSI are reported. These empirical results have largely confirmed the expected benefits that were determined through simulation and accurate model-based testing. [ABSTRACT FROM AUTHOR]

This paper proposes an “isolated soft switching current fed LCC-T resonant dc–dc converter for PV/fuel cell applications.” This converter is able to achieve zero voltage switching for front-end inverter switches and zero-current switching for voltage doubler diodes. The majority of dc–dc converters have compact capacitive (C) filter in output, but high harmonic currents through transformer makes them bulky. The proposed converter attempts to improve harmonic content through a transformer under wide load and input variations as well as it can significantly reduce required turns ratio of transformer to achieve required output voltage. For the above reasons, the proposed converter can offer better footprints and therefore it can be a potential candidate for PV/fuel cell applications. This paper presents basic operating principal, detailed analysis, control, and design of the proposed converter with the help of an example. This converter operates in two modes, i.e., constant duty cycle mode and constant frequency mode, depending on load demand, and is explained through operating curves. Finally, experimental results are included for justifying the proposed theory. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

This paper proposes a modular on-road wireless power transfer system with interoperable power adjustment mechanism. The paper is anticipated to enhance the capability of on-road charging during the movement of automated guided vehicles (AGV), by which the traveling mileage is increased, while the battery volume is decreased. The system design includes an interoperable power adjustment technique based on the detected impedance, and the moving position of AGV can be, hence, comprehended so as to facilitate the adjustment of the output power from each transmission module in a more flexible way. Through the investigation of on-road charging efficiency, all of coil magnetic analysis, misalignment charging evaluation, system stress simulation, and resonant characteristics investigation are performed. Experimental results gained from software simulation and hardware realization are beneficial for AGV charging applications. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

In a sensorless vector control method, at low speeds and self-commissioning for AC motors, it is necessary to model dead time, rise/fall time, parasitic capacitors, and semiconductors’ voltage drop accurately. In this paper, voltage drop in each phase due to the nonlinear behavior of the inverter from the control system's viewpoint is precisely modeled by using two lookup tables. These lookup tables make the proposed model robust against the dc-link voltage and carrier frequency variations in the entire current range. In conventional methods at standstill, the measured voltage in the dc current test contains the nonlinearity of two phases. Therefore, to obtain the nonlinear voltage of each inverter phase, it is assumed that the values of inverter nonlinearity voltage at both high current and low current are equal. This simplification leads to distortion in measured voltage in the low currents. However, in this paper, the voltage drop equation of each phase is solved by numerical method that is realizable in conventional processors. The results obtained in actual voltage measurement show the superiority of the proposed method over traditional methods in the low currents. The proposed method is verified by using a voltage source inverter feeding a 2.2-kW three-phase induction motor. [ABSTRACT FROM AUTHOR]

This paper presents a new topology based on a modified class-E resonant inverter used as an LED series current regulator. The proposed topology behaves as a controllable nondissipative impedance that adjusts the current flowing through the lamp. In this circuit, the LED is placed at the dc side of the class-E inverter, in series with the input filter inductance. The power handled by the ac side is sent back to the input by means of two diodes. Despite the addition of these two diodes, the converter maintains all the advantages of the class-E inverter: low component count, simple control, and extremely low switching losses. The LED current can be controlled with a small variation of the operating frequency. This way, the low-frequency current ripple of the lamp can be strongly reduced even when there is a considerably high input voltage excursion, such as the one expected in electrolyticless high-power-factor LED ballast. This paper proposes a simplified methodology based on the fundamental approach aiming to design and build a laboratory prototype. The prototype is designed in order to minimize the effect of LED voltage in the output current. This way, the input voltage ripple can be canceled using a simple feedforward control. [ABSTRACT FROM AUTHOR]

The second harmonic current compensator (SHCC) can be added into the single-phase converters for compensating the second harmonic current (SHC) and thus removing the undesired electrolytic capacitor. In this paper, a virtual impedance, which is in the form of a capacitor and a resistor connected in parallel, is introduced to be in parallel at the bus-side port of the SHCC for effectively compensating the SHC while guaranteeing the system stability. This virtual parallel impedance is realized by feeding forward the bus-side port voltage of the SHCC, and thus the SHCC can be modular designed. The closed-loop parameter design of the SHCC is also presented. A 3.3-kW prototype of a two-stage single-phase power factor correction converter is built and tested in the laboratory, and the experimental results verify the effectiveness and feasibility of the proposed control method. [ABSTRACT FROM AUTHOR]

This paper proposes a method to boost the terminal voltages using a capacitive network. The boosted voltage can improve the power capability of an interior permanent magnet synchronous motor (IPMSM). In the conventional drive system fed by a voltage-source inverter, the terminal voltages of the motor are limited by the dc-link voltage. Such a voltage limitation reduces the torque capability at high speeds. Thereby, the maximum output power is limited. To overcome this feature, series capacitor network between the inverter and the motor is introduced in the proposed IPMSM drive system. The series capacitors boost the motor terminal voltages higher than the inverter voltages to increase the rated speed, resulting in improved power capability. The rated speed in the proposed drive system can be redefined to the desired value through a capacitive network. The enhanced power capability and design freedom in the rated speed are particularly advantageous in fan-load applications where the load torque is proportional to the square of speed. This article presents the structure, d–q equivalent model, operating characteristics, and operable area of the proposed drive. Experimental results are given to verify the feasibility and effectiveness of the proposed system. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

Microinverters require high voltage gain capability for interfacing the low dc voltage output of photovoltaic (PV) module to single-phase ac grid. A two-stage nonisolated inverter is proposed in this paper, with a first boost stage and a second traditional pulse width modulated grid-tied inverter stage. The proposed boost stage consists of a coupled inductor added with a voltage multiplier to achieve the required high voltage gain at high efficiency and to operate over a wide input voltage range. Among the coupled inductor topologies, adding a clamp circuit is a common solution to limit the voltage spike caused by leakage inductance. In the proposed converter, the resonance between the coupled inductor and voltage multiplier is used to address the issue of voltage spike, thereby reducing both component count and device voltage stress. Detailed analysis and design procedure of the proposed converter is presented in this paper. Experimental results of a 250-W microinverter are presented to validate the proposed converter. [ABSTRACT FROM PUBLISHER]

This paper presents a new multilevel converter topology based on a variable or multilevel dc-link stage. This stage is shared by all inverter output phases, thus increasing the number of output voltage levels while reducing the overall number of active devices compared to traditional topologies; therefore, it is called a reduced multilevel converter (RMC). The converter is not capable of reducing the blocking voltage of the devices; hence, unlike other multilevel converters aimed at medium-voltage applications, this converter is interesting for low-voltage- and high-power-quality-demanding applications such as photovoltaic inverters, wind energy conversion systems, and uninterruptible power supplies. The main novelty behind the proposed concept is the basic dc cell used to generate the variable dc-link voltage, which includes a controlled path through the floating capacitors to provide the necessary degree of control to enable a shared multilevel dc link for all the output phases of the converter. The dc cells are connected in a multicell structure to increase the number of levels of the converter. A five-level version of the RMC topology is briefly compared to other five-level converters such as the five-level active neutral-point-clamped converter and the five-level flying capacitor converter. This paper presents the structure of the new topology with its operating principle, switching states, main characteristics, and experimental validation using finite-control-set model-predictive control. [ABSTRACT FROM PUBLISHER]

To improve light load efficiency, a three-phase photovoltaic (PV)-based microinverter may operate in single-phase, two-phase or three-phase mode depending on the available input power. Therefore, its dc-link capacitor may be subjected to large peak-to-peak voltage ripple when operating in phase skipping mode. This paper determines the minimum value of the dc-link capacitor by allowing the maximum acceptable voltage ripple on the dc link. This allows for the use of film capacitors instead of electrolytic capacitors in order to improve the microinverter reliability. Unfortunately, higher dc-link voltage ripple introduces harmonic distortion on the inverter output current waveform if it is not compensated for by the dc-link voltage controller. This paper proposes a simple synchronous control method to regulate the dc-link voltage with the presence of large voltage ripple. The dc-link voltage controller is synchronized with the phase-locked loop and samples the average value of dc-link voltage without introducing unwanted harmonics into the voltage sense path. Experimental results were obtained from a 300-W three-phase half-bridge microinverter prototype to verify the proposed dc-link voltage control performance. Inverter output current total harmonic distortion of 1.6% was achieved even though the dc-link peak-to-peak voltage ripple reached as high as 87 V with 219-V split dc-link voltage. Dynamic response is fast enough to easily track the most extreme ramp change in input PV power. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper presents a method for small-signal dynamic studies of power systems including utility-scale PV energy systems considering the effects of dc-side components. Existing methods commonly model a PV energy system as a dc source connected to a grid-tied inverter. This paper shows that the dc components of a PV energy system can also contribute in the dynamics of the power system in the range of small-signal studies. The paper first develops the model of a PV energy system by merging the submodels of dc- and ac-side components. Then, a method to obtain the augmented model of the power system including a PV energy system will be explained using a study system. The study system consists of a PV energy system in parallel with a synchronous generator connected to a grid. Then, based on eigenvalue analysis, verified by time-domain simulations, it is shown that the dc-link capacitor, front-end converter, and its controller can introduce oscillatory modes in subsynchronous range of frequencies. Furthermore, it is shown that the damping of the sensitive modes can significantly vary with respect to the parameters of the dc-side components. [ABSTRACT FROM PUBLISHER]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

A single-phase common-mode transformerless grid-connected photovoltaic (PV) converter, which is based on the integration of two stages, is proposed in this paper. Transformer elimination in grid-connected PV systems has many advantages. It not only reduces cost, size, and weight but also increases the complete system efficiency. Since there is no galvanic isolation between grid and PV array, a leakage current may appear due to the PV parasitic capacitance to the ground, if this is not taken into account in the converter design. This paper presents a dc/dc boost converter integrated with a full-bridge inverter. The integration of these two stages reduces the ground leakage current. The neutral line of the grid is directly connected to the negative terminal of the PV array, eliminating any possibility of leakage current in this terminal. The principle of operation of the transformerless converter is analyzed, and a 200-W topology is experimentally tested. [ABSTRACT FROM PUBLISHER]

This paper proposes an effective sliding mode controller (SMC) for a grid-connected 7-level packed U-cell (PUC7) inverter. The aim is to design a simple controller that deals effectively with the complex control problem of the PUC7 inverter (multiobjective control problem). The selection of the control actions is achieved according to the system state error at every sampling time, regardless of the previous values, which makes the control technique model-independent. The control algorithm evaluates online two cost functions (one for each state error), which are derived on the basis of sliding mode theory, and it selects the optimal control input in order to satisfy the reaching conditions of the two cost functions. Compared with the existing solutions, the proposed SMC technique ensures lower average switching frequency by tuning the hysteresis bandwidth of the capacitor-voltage error. The fast implementation, needless of gains tuning, and simple design procedure are the main features of the proposed algorithm. Simulation and experimental results are presented to prove the effectiveness of the proposed technique in controlling the PUC7 inverter with high dynamic performance and robustness against disturbances and parameters mismatch. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel inverter (MLI) topology that utilizes trinary sequence for the dc sources. It gives maximum output voltage level with minimum dc source and switch count when compared to other sequences, such as symmetric, natural, binary, and quasi-linear. This is due to the fact that the trinary sequence generates of all additive and subtractive combinations of input dc levels in the output voltage waveform. The concept is implemented on a 9-level asymmetric MLI using only four active devices. Multicarrier unipolar pulsewidth modulation technique is adopted to create the switching pulses. Theoretical calculation of total harmonic distortion in both voltage and current waveforms has been performed using asymptotic time domain formula. These values are compared with simulation and experimental values for different modulation indices. Power loss calculation for proposed topology is discussed with appropriate mathematical equations. [ABSTRACT FROM AUTHOR]

Squirrel-cage induction motor (SQIM) fed by a pulsewidth modulated voltage source inverter (VSI) is subjected to voltage and current surges. It may cause additional losses in the motor, insulation failure, high bearing current, and electromagnetic interference. To mitigate these problems, sinusoidal LC filter is placed at the ac-side of the VSI. This paper proposes a new methodology to design the filter. In this method, the filter inductance is chosen based on the maximum ripple in the inverter ac-side current and the voltage drop across the filter inductor, and the filter capacitor is chosen based on the steady-state reactive power demand of the SQIM. The effects of the designed filter on the switch current, losses in the drive, temperature of the dc-link capacitor, dv/dt at the motor terminal, stator flux, and air-gap torque of the SQIM are discussed. The performance of the drive with the filters, designed by the proposed method and the standard method, are experimentally tested on a two-level silicon carbide VSI-fed SQIM and comparative analysis is carried out. The impact of the designed filter on the drive is also shown when the neutral point of the filter capacitors is connected with the mid-point of the dc link. The stability of the closed-loop controlled SQIM drive with the proposed filter, and simulation results are presented to verify its performance. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLI) with reduced components are becoming popular to achieve higher voltage levels with lower cost and complexities of the circuit. Most of the reduced switch MLIs use a large number of isolated voltage sources that have a large total standing voltage (TSV) and higher losses. Moreover, many reduced component MLIs have been developed to reduce the number of switches only and have not utilized the dc-link voltages properly. Thus, an inverter needs to be designed in which the number of dc sources is also small and utilized fully. In this paper, a novel single-phase, multicell MLI configuration is presented that can generate a maximum number of output voltage levels using a minimum number of switches and dc sources. Two optimal configurations of the proposed MLI are proposed based on the minimum requirements of components with the optimum voltage stress of the highest rated switches. Moreover, the TSV of the proposed optimal MLI also becomes low. A generalized multicell optimum MLI is presented and the number of components, voltage stress of all the switches, and the TSV of the proposed as well as the other inverters also determined by the generalized expressions for comparison purpose. The prototype of a specimen 15-level inverter and the optimal 75-level inverter cell is further developed and implemented using DS 1103 in the laboratory to show the effectiveness of the proposed configuration. The experimental results corresponding to the different modulation indices are presented here for the verification of the simulation results. [ABSTRACT FROM AUTHOR]

This paper presents a novel fault-tolerant method for active–neutral-point-clamped (ANPC) inverter using a modified carrier-based pulsewidth modulation. At a fault event, the ANPC inverter is divided into subinverters, and the modulating signal is modified to two modulating signals. The modified modulating signals are used to control the subinverters and allow continuous operation of the three-level ANPC inverter during faulty conditions even up to four open-switch faults per phase. This technique provides the fault-tolerant capability of the ANPC inverter without the need to add any additional phase legs or complex control strategies. Furthermore, the proposed technique ensures the voltage balancing of the dc-link capacitors. The performance of the proposed fault-tolerant technique is verified through simulation studies in MATLAB/Simulink under different faulty conditions. The feasibility of the proposed technique is also verified experimentally. [ABSTRACT FROM AUTHOR]

Laminated busbars connect capacitors with switching power modules, and they are designed to have low stray inductance to minimize electromagnetic interference. Attempts to accurately measure the stray inductance of these busbars have not been successful. The challenge lies with the capacitors, as they excite the busbar producing their individual stray inductances. These individual stray inductances cannot be arithmetically averaged to establish the total stray inductance that applies when all the capacitors excite the busbar at the same time. It is also not possible to measure the stray inductance by simultaneous excitation of each capacitor port using impedance analyzers. This paper presents a solution to the above dilemma. A vector synthesis method is proposed, whereby the individual stray inductance from each capacitor port is measured using an impedance analyzer. Each stray inductance is then mapped into an xyz frame with a distinct direction. This mapping exercise allows the data to be vectored. The total stray inductance is then the sum of all the vectors. The effectiveness of the proposed method is demonstrated on a busbar designed for H-bridge inverters by comparing the simulation and practical results. The absolute error of the total stray inductance between the simulation and the proposed method is 0.48 nH. The proposed method improves the accuracy by 14.9% compared to the conventional technique in measuring stray inductances. [ABSTRACT FROM AUTHOR]

A multilevel dodecagonal voltage space vector generation scheme for variable-speed drive applications with single-dc-link operation requires a large value of capacitance for cascaded H-bridge (CHB) filters, when operated at lower speeds. In existing schemes, the multilevel dodecagonal structure is obtained by cascading a flying capacitor inverter with a CHB. In this paper, a new scheme has been proposed to minimize the capacitance requirement for full speed operation by creating vector redundancies using modular and equal voltage CHBs. Also, an algorithm has been developed to optimize the selection of vector redundancies among the CHBs in order to minimize the voltage ripple of the floating capacitors. The proposed algorithm considers instantaneous capacitor voltages and phase currents for optimal selection of vector redundancies. A mathematical model for capacitor voltage deviation is presented, and the effectiveness of the proposed algorithm is verified in both the simulation and the experiment. [ABSTRACT FROM AUTHOR]

This paper presents the current control design procedure of a single-phase grid-tied five-level packed U-cell inverter (PUC5) with an LCL output filter. The PUC5 inverter is used as an interface of renewable energy sources, such as solar applications. The LCL filter is calculated according to the grid-tied operation and converter ratings. An optimal controller, based on a linear quadratic regulator with integral action, is designed to inject a sinusoidal current with low harmonic distortion at unity power factor. For that design, the PUC5 inverter is modelled in the D–Q frame. The sensorless voltage control is incorporated into the switching technique to balance the PUC5 capacitor voltage and generate a five-level waveform at the output. Experimental tests are performed on a laboratory benchmark to confirm the theoretical design. The results prove the efficiency and accuracy of the adopted control strategy in a steady state and under transients of grid current, grid inductance, ac and dc voltage amplitudes. [ABSTRACT FROM AUTHOR]

Input-series-output-parallel (ISOP) inverter system is very suitable for high dc input voltage and large ac output current power conversion applications. If this topology is applied to the grid-connected occasion, a bulky-capacity grid-connected inverter can be built with multiple small-capacity standardized inverter modules, which can significantly improve the reliability of the system operation and facilitate system design. In this paper, we investigate an ISOP LCL-type grid-connected inverter system, and put forward an optimized way for the topology of combined LCL filters first. Then, the inverter-side inductor current is carefully chosen as the controlled variable and thus a concise distributed control method is proposed to achieve multiple control objectives. On the basis of the presented distributed control, the redundant control technique is also provided to heighten the reliability of the grid-tied ISOP inverter indeed. Finally, a three-module prototype is built and the experimental results validate the effectiveness of the raised strategy. [ABSTRACT FROM AUTHOR]

Two-stage isolated battery-driven grid interface (IBDGI) with front-end three-phase dual active bridge (DAB) dc–dc converter is promising to be applied in the residential battery energy storage system for supporting photovoltaic (PV) integration, load shifting, and backup power purposes. However, the second harmonic current (SHC) caused by the pulsating power of the downstream single-phase inverter will increase the battery's degradation and the component stress of the front-end converter. In this paper, a reduction method is proposed for the IBDGI with three-phase DAB converter using a load current feedforward control. The proposed idea is to incorporate virtual impedance to the output impedance of the front-end converter. The easy-to-be-implemented method does not need to modify the original voltage closed-loop controller but suppress SHC while keeping good dynamic performance. As the first step, the small-signal model of the three-phase DAB converter is provided. The parameter sensitivity analysis is proposed to demonstrate that the SHC can be well-suppressed within $\pm \text{20}\%$ parameter error of the feedforward control. Finally, a 1 kW experiment setup is built to verify the performance of the proposed SHC reduction method. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

In this paper, a novel structure of switched capacitor converter (SCC) is proposed. First, the basic unit of the proposed SCC is presented. After that, a generalized structure of the proposed SCC is discussed. The presented SCC uses one dc source, several switches, diodes, and capacitors to produce multistep dc boosted output voltage. The capacitors in the SCC can be charged in trinary asymmetrical pattern. A detailed comparative study between the proposed and other recently developed SCC structures is presented. It is shown that the proposed SCC can produce an output voltage level with lower total standing voltage and lower maximum switch stress voltage as compared to most of the suggested SCC structures. Further, a switched capacitor multilevel inverter (SCMLI) based on cross-switched multilevel inverter has been developed and analyzed for symmetric and asymmetric dc source configurations. For fair comparison with the existing SCMLI structures, the overall cost of the structures is compared based on a cost function (CF). The proposed SCMLI provides lower cost function/output voltage level (CF/NL) in comparison with most of the other SCMLI structures for both symmetric and asymmetric dc source configurations. Extensive experimental studies validate the operation and performance of the proposed SCMLI structure. [ABSTRACT FROM AUTHOR]

Beat phenomenon is an important concern in the reduced dc-link capacitance motor drive system. In previous research works, the topic is mainly concentrated on the beat phenomenon caused by the interaction of the fluctuated dc-link voltage and the motor phase voltage. In this paper, another form of the beat phenomenon generated by the fluctuated dc-link voltage and the severely fluctuated load torque is investigated. The effect of the beat phenomenon on the grid current and the motor speed is analyzed, which fluctuate with the low-frequency oscillation. In order to improve the drive system performance, a power balancing controller is proposed to suppress the grid current fluctuation, and a resonant controller is utilized to regulate the periodic power signals. Meanwhile, the applied fluctuated torque suppression method could improve the performance of the motor speed, which is only sensitive to the frequency of the fluctuated load torque. Experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Aluminum electrolytic capacitors (AECs) are connected in a bank to meet the requirement of capacitance, voltage, and current rating for dc-link of power electronic converters. The performance of capacitor bank deteriorates with time due to the degradation of AECs in the bank. Further, each AEC in the bank degrades differently based on its core temperature, which in turn depends on the current and its equivalent series resistance (ESR). Therefore, health monitoring of a bank would require monitoring of individual AECs in the bank. However, extending the available literature on health monitoring of an AEC to the capacitor bank would require voltage/current sensors for individual AECs. To address the aforementioned issue, this paper suggests a method to assess the health of individual AECs online in the bank without using sensors for each AECs. The proposed method involves estimation of current through each capacitor, which is used to determine the core temperature by using a thermal model of AEC. The core temperature is used for estimation of ESR and capacitance of each capacitor using physics-of-failure based degradation model. For the consistent matching of the degradation model to the actual degradation of the capacitor, the coefficients of the model are sequentially updated. For updating, an algorithm based on extended Kalman filter is used. The proposed scheme is experimentally validated on laboratory prototype of single-phase, grid-connected solar PV inverter under variable load conditions. [ABSTRACT FROM AUTHOR]

The nine-arm modular multilevel converter (9A-MMC) has been recently proposed as a reduced MMC topology variation for six-phase drive applications, with 25% reduction in the number of employed arms and associated components, compared to a standard dual three-phase MMC, however with a limited output voltage amplitude. This paper proposes a hybrid 9A-MMC comprised of half-bridge submodules (SMs) in both the upper and lower arms, and full-bridge SMs in the middle arms. By employing the negative-voltage state of the full-bridge SMs, the hybrid 9A-MMC avoids the limitations imposed on the dc-link voltage utilization, while achieving further reduction in the component count, compared to a standard 9A-MMC with identical half-bridge SMs. The operating principles of the proposed hybrid 9A-MMC are illustrated with mathematical analysis, whereas its characteristics are verified through both simulation and experimentation. An assessment of the proposed topology quantifying its employed components is also provided, in comparison to other MMC-based six-phase machine drives. [ABSTRACT FROM AUTHOR]

In this paper, a new Lyapunov-based model predictive controller is proposed for a 7-level packed U-cell (PUC7) grid-connected inverter. A cost function of the proposed model predictive controller is designed from the system stability point of view, inspired by the Lyapunov control theory. The proposed controller eliminates the need for gains that are associated with cost function coefficients, as seen in classical model predictive control based controllers. Therefore, the control design problem is significantly simplified. In addition, the average switching frequency is also reduced, as shown in both simulation and experimental results, leading to a reduction in switching losses. Simulation and experimental tests, on a PUC7 lab prototype, demonstrate the excellent performance of the proposed control system, in terms of high disturbance rejection, robustness to parameter mismatches, and fast dynamic response. Such features qualify the proposed control strategy as a good candidate for grid-tied applications. [ABSTRACT FROM AUTHOR]

The magnetic resonant wireless power transfer (WPT) system with a class E inverter has wide application in mid-range power transmission, especially for several megahertz scenario. However, it is cumbersome for the existing modeling and analysis methods to obtain the analytical solution to the system variables, which limits the evaluation of system characteristic. This paper proposes a nonlinear mathematical model for the WPT system with a class E inverter. The equivalent small parameter method (ESPM) is first adopted to solve the proposed six-order nonlinear model, and symbolic-form steady-state periodic solutions are yielded. During the whole solving process, only three iteration steps are needed for the proposed method. Compared with other existing modeling and analysis methods, the symbolic periodic results acquired by the ESPM exhibit sufficient accuracy by virtue of the combination of more higher harmonics. Meanwhile, the calculation complexity is simplified remarkably. Simulation and available experiments validate the effectiveness and accuracy of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

Synchronverters are inverters that mimic the behavior of synchronous generators. In this paper, we propose five modifications to the synchronverter algorithm from the paper “Synchronverters: Inverters that mimic synchronous generators,” (IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1259–1267, Apr. 2011), to improve its stability and performance. These modifications are implemented in software and do not require any changes in the inverter hardware. The first two modifications concern the control of the virtual field current in the synchronverter so that it is more robust to faults. We prove the stability of the grid-connected synchronverter with this improved field current controller. The third modification is to increase the effective size of the filter inductors virtually. This is motivated using results from the stability analysis of a constant field current synchronous generator connected to an ac power grid and also by practical considerations. Simulations and experiments show that this leads to a much better response to changes in grid frequency, voltage, or to imbalance in the grid. The fourth modification is to change the formula for the (virtual) nominal active mechanical torque to take into account the (virtual) losses in the output impedance of the converter. This makes the tracking of the desired active power much more accurate. The fifth modification is to introduce virtual capacitors in series with the inverter outputs to filter spurious dc components from the current supplied to the grid. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge Z-source inverter is proposed. The proposed topology has only one impedance network. Unlike to the conventional half-bridge inverter, the proposed topology can provide zero voltage level at the output. It also increases output voltage level and stabilizes it in the desired value. Capacitor voltage stress in the proposed topology is low, and, therefore, nominal voltage of capacitor and cost decreases. In this paper, the steady-state analysis of the proposed inverter in two new operations which are named synchronous operation of diodes and asynchronous operation of diodes is conducted based on mathematics calculations. A method to obtain high-voltage gains by cascading the Z-network and combining middle inductors is presented that leads to cost, size, and weight reduction. Comparison among the proposed converter with conventional ones shows its excellent performance. The experimental results have good agreement with analytical analysis for the proposed topology. [ABSTRACT FROM PUBLISHER]

A quasi-Z-source modular cascaded converter (qZS-MCC) is proposed for dc integration of high-power photovoltaic (PV) systems. The qZS-MCC comprises series-connected front-end isolated qZS half-bridge (HB) dc–dc converter submodules (SMs). With the front-end isolation, the qZS-MCC achieves high-voltage dc capability, while maintaining modularity and PV panel grounded. The post-stage qZS-HB handles the PV voltage and power flows, dc-link voltage balance, and output-series power integration. Whereas, the front-end isolation converters of all SMs perform a constant duty cycle, lowing the control complexity. There is no double-line-frequency power flowing through the dc-side PV panels, qZS inductors, and qZS capacitors in the qZS-MCC, so small qZS impedance is possible compared to the existing qZS cascaded multilevel inverter. The configuration, operating principle, power loss evaluation, and passive components design of the proposed system are investigated in this part of the paper. The system control, modeling, and corresponding verifications are stated in Part II of this paper. [ABSTRACT FROM PUBLISHER]

To improve the power factor and reliability for medium/high-power supply, a three-phase single-stage ac–dc converter based on magnetic-combination transformer with power factor correction (PFC) function is presented in this paper. According to the three-phase instantaneous power balance principle and the concept of the magnetic-flux superposition, a novel magnetic-combination transformer is proposed, which can make three-phase symmetrically and sinusoidally fluctuant power add to be constant. Therefore, the induced voltage of the secondary winding is constant. To realize sinusoidally fluctuant power in the input stage, dc-link filter capacitance can be reduced to a several-microfarad level. Single-stage PFC function, no electrolytic capacitor, and constant output voltage can be realized in the converter. The principle and the structure of the novel magnetic-combination transformer are analyzed in detail in this paper. Simulation and experimental results are presented to verify the feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

Zero-common-mode-voltage (CMV) operation of multilevel inverters results in reduced dc-bus utilization and reduced linear modulation range. In this paper, a method to increase the linear modulation range for zero-CMV operation without increasing the dc-bus voltage using a cascaded multilevel inverter with a single dc supply is presented. Using this method, the peak fundamental output voltage can be increased from 0.499 to 0.637  \textV\text{dc} with zero CMV inside the linear modulation range. Also, various pulse width modulation (PWM) switching sequences are analyzed in this paper, and the PWM sequence that gives minimum current ripple is used for the zero-CMV operation of the inverter. The inverter topology with single dc supply is realized by cascading a two-level inverter with two floating-capacitor-fed full-bridge modules. Simulation and experimental results for steady-state and dynamic operating conditions are presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]