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In applications that demand single-input dual-output (SIDO) or dual-input single-output (DISO) dc–dc converters, employing two separate single-input single-output (SISO) converters is a solution. However, the number of components is doubled, resulting in high overall cost. In order to reduce costs, this paper proposes a novel topology synthesis methodology, with which a variety of SIDO and DISO dc–dc converters with reduced components can be derived. The principle of topology synthesis states that integrated SIDO and DISO dc–dc converters can be easily developed from conventional SISO converters by replacing a diode with a basic cell inclusive of additional input/output port. The principle is effective for many SISO dc–dc converters, and as an example, topology synthesis based on buck, boost, buck–boost, Cuk, sepic, and zeta SISO converters is performed in this paper. In order to achieve better understanding of the proposed converters, the integrated SIDO Cuk converter is specifically analyzed and experimentally verified. In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter. In addition, zero-voltage-switching operation of one switch is achieved, contributing to lower switching losses. Finally, a prototype circuit with 48-V input and 156 V/1 A, 24 V/4 A outputs is built to validate the theoretical analysis. [ABSTRACT FROM PUBLISHER]

MR16 lighting system with a high-frequency step-down electronic transformer is widely used in commercial lighting. In this paper, a single-switch quadratic boost light emitting diode (LED) driver compatible with electronic transformers for the MR16 lighting system is proposed and analyzed. It combines a prestage boost power factor correction (PFC) converter and a second-stage boost dc–dc converter with a single switch. The effect of the dc link voltage ripple of the prestage boost PFC converter on the output of the second-stage boost dc–dc converter is eliminated by a fast voltage mode control loop of a second-stage circuit. Therefore, flicker-free low ripple LED current is achieved. With a small dc link voltage ripple of prestage, the turn-on time of the active switch is almost constant in a half-line cycle. Therefore, PFC can be achieved with inductor current of prestage operating in a discontinuous conduction mode. With small input capacitance, the proposed LED driver presents a good compatibility performance with different kinds of electronic transformers. Furthermore, the proposed LED driver needs only one active switch and one control loop, which makes circuit volume small and low cost. Finally, a 4 W LED driver for a small-size MR16 lighting system is provided to verify the studied results. [ABSTRACT FROM AUTHOR]

Single-stage power-factor-corrected (S2PFC) power supplies usually suffer from high voltage stress, due to lack of control on the intermediate bus capacitor voltage. In the past, analysis of such voltage stress was mostly based on steady-state condition without providing sufficient explanation during the transient circuit operation. This paper revisits the problem at circuit level and reports that the root cause is due to the inherent negative current feedback property of the output inductor or the transformer operating in continuous conduction mode (CCM). Based on the finding, this paper further proposes a new approach to reducing the voltage stress by adding an auxiliary circuit branch to existing S2PFC converters. The additional circuit branch limits the effect of negative current feedback by suppressing the change of output current slope due to change of load. This assists the pulsewidth modulation controller to track the change of load better such that the bus capacitor voltage range is reduced through duty cycle control. The auxiliary circuit branch also reduces reverse-recovery-related losses of the converter under CCM operation. A laboratory prototype using the popular boost PFC converter combined flyback dc/dc converter was built and tested to confirm the analysis and effectiveness of the approach. [ABSTRACT FROM AUTHOR]

Three-level buck dc–dc converters have advantages over the traditional buck converters: half switch voltage stress, doubling effective switching frequency, smaller inductor size, and the higher power density. To benefit from those advantages, the flying capacitor voltage must be balanced at half of the input voltage. Most existing methods of balancing the flying capacitor voltage require current sensing, which increases the cost and noise sensitivity. This paper proposes a novel state-machine structure of second-order sliding-mode (SOSM) control for three-level buck dc–dc converters without sensing currents. With insensitivity to parameter variations of SOSM control, the proposed control approach tackles the strongly coupled problem of output voltage and flying capacitor voltage in three-level buck dc–dc converters. Compared to existing approaches, the controller achieves fast start-up without overshoots, fast load disturbances rejection, and robustness against parameter uncertainties for the output voltage, and balance of the flying capacitor voltage without sensing the current of flying capacitor. The proposed approach is verified with experimental results of a 1.25 V, 2.5 A prototype. [ABSTRACT FROM PUBLISHER]

It is known that the ripple-based control of a switching dc–dc converter benefits from a faster transient response than a conventional pulse width modulation (PWM) control switching dc–dc converter. However, ripple-based control switching dc–dc converters may suffer from fast-scale oscillation. In order to achieve fast transient response and ensure the stable operation of a switching dc–dc converter over a wide load range, based on a conventional pulse train (PT) control technique, a peak capacitor current PT (PCC-PT) control technique is proposed in this paper. With a buck converter as an example, the operating modes, steady-state performance, and transient respond performance of a PCC-PT controlled buck converter are presented and assessed. To eliminate fast-scale oscillation, circuit and control parameter design considerations are given. An accurate discrete iteration model of a PCC-PT controlled buck converter is established, based on which the effects of circuit parameters on the stability of the converter operating in a discontinuous current mode (DCM), mixed DCM-continuous conduction mode (CCM), and CCM are studied. Simulation and experimental results are presented to verify the analysis results. [ABSTRACT FROM PUBLISHER]

For discontinuous conduction mode (DCM) dc–dc converters with digital sensorless current mode (DSCM) control, an observed current error occurs, owing to a low-accuracy current observer. Moreover, a reference current error occurs due to a low-accuracy current controller or a finite dc gain of current loop. Conventionally, the observed current is compensated to increase current regulation accuracy, whereas the reference current error is neglected. However, for charge balance principle (CBP)-based DSCM (CBP-DSCM) control, this paper proves that the reference current should be compensated in a same quantity to that of observed current. Otherwise, single or unequal compensation leads to output voltage steady-state error. For this reason, a dual current error compensation strategy for CBP-DSCM control is proposed. It compensates the errors in a same quantity through a current error observer, which considers parasitics and calculates the current errors without approximation. To verify the proposed strategy, small-signal models with parasitics for both the converter and the controller are constructed by differential functions of key variables. Furthermore, converter stability is analyzed at typical operation condition, while the stability at various operation conditions is verified through robustness analysis. Finally, simulations and experimental results verify the analysis and the improved transient response of the converter. [ABSTRACT FROM AUTHOR]

This paper presents high step-up dc-to-dc converter for low voltage sources such as solar photovoltaics, fuel cells, and battery banks. To achieve high voltage gain without large duty cycle operation, combination of coupled inductor and switched capacitor voltage doubler cells are used. By incorporating active clamp circuit, voltage spike due to the leakage inductance of the coupled inductor is alleviated and zero-voltage switching turn on of the main and auxiliary switch is obtained. Due to the use of MOSFETs of low voltage rating and soft turn on of the switches, conduction loss and switching losses are reduced. This improves the efficiency and power density of the converter. The proposed converter can achieve high voltage gain with reduced voltage stress on MOSFET switches and output diodes. Design and analysis of the proposed converter is carried out, and finally, a 500-W experimental prototype is built to verify theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel multiple-input bidirectional dc–dc power converter to interface more than two dc sources of different voltage levels. This finds applications in hybrid electric/fuel cell vehicles (FCVs), where different dc sources of unequal voltage levels need to be connected with bidirectional power flow capability. The converter can be used to operate in both the buck and boost modes with bidirectional power control. It is also possible to independently control power flow between any two sources when more than two sources are actively transferring power in either directions. The operation, analysis, and design of the converter are presented with different modes of power transfer. The proposed converter is demonstrated for FCV application using real-time hardware-in-the-loop system. Experimental results for a 5-kW system are presented, validating the theoretical analysis. [ABSTRACT FROM PUBLISHER]

The propagation delay of a comparator and dead time causes the duty-discontinuity region near the boundary of the step-down and step-up regions in a non-inverting buck–boost (NIBB) converter. The duty-discontinuity region leads to an unstable output voltage and an unpredictable output voltage ripple, which might cause the entire power system to shut down. In this paper, a mode-transition technique called duty-lock control is proposed for a digitally controlled NIBB converter. It locks the duty cycle and eliminates the error between the output voltage and the reference signal by using a proposed fixed reference scheme that ensures the stability of the digital controller and output voltage. The experimental results that were applied to a field-programmable gate array-based platform revealed that the output voltage of the NIBB converter is stable throughout the entire transition region, without any efficiency tradeoffs. The input voltage of the converter that was provided by a Li-ion battery was 2.7–4.2 V, and the output voltage was 1.0–3.6 V, which is suitable for radio-frequency power amplifiers. The switching frequency was 500 kHz, and the maximum load current was 450 mA. [ABSTRACT FROM PUBLISHER]

For a sensorless predictive current controlled boost dc–dc converter, its small-signal model that contains a number of parasitic parameters, is derived in this paper. This model indicates that the type of system becomes type 0 even with the correction of voltage loop proportional–integral controller, leading to the existence of output voltage steady-state error. Then a self-correction differential current observer (SDCO) is proposed to eliminate this steady-state error and gain high transient response speed. The self-correction part of the SDCO makes the system become type 1 to achieve no steady-state error for output voltage, whereas the differential part can guarantee that the intermediate calculation results do not overflow. By carrying out a series of simulation verifications, further investigation proves that the proposed algorithm has good robustness. Finally, the effectiveness of the proposed algorithm is verified by experimental results. [ABSTRACT FROM PUBLISHER]

This paper unifies the underlying concepts of all basic single-switch, two-state, dc-to-dc voltage-sourced converters, by duality, as generic related current and voltage-sourced converters. By using ac and dc circuit theory, the three basic converters can be transformed to yield all known transfer functions and realizes a proliferation of 33 topologies, three being previously unidentified topologies with unique characteristics. The circuit based systematic unifying approach offers new insight and an alternative interpretation to the origin of the 33 topologies including the Zeta, Cuk, \pmLuo, CSC, Landsman, and Sepic converters. Converter time-domain simulations and corresponding practical results of the three new topologies extol and culminate the concepts and analysis presented. [ABSTRACT FROM PUBLISHER]

The pulse-train (PT) control technique for switching dc–dc converters is simple to design and benefits from excellent control performance. Up to now, almost all of the works on PT control are focused on switching dc–dc converters operating in discontinuous conduction mode, with few works reported on PT control of switching dc–dc converters operating in continuous conduction mode (CCM). In this paper, a PT-controlled CCM buck converter is studied and a unique low-frequency oscillation phenomenon is revealed, which results in large undesired inductor-current and output-voltage variations. The effect of equivalent series resistance (ESR) output-capacitor on the low-frequency oscillation is examined. The results indicate that such oscillation occurs when the ESR output-capacitor is relatively small and disappears when it is relatively large. However, a larger ESR will result in a large output-voltage ripple. In order to avoid the low-frequency oscillation and, at the same time, to ensure a small output-voltage ripple, the ICRIF circuit is applied. In this way, a small ESR output-capacitor can be used to decrease the output-voltage ripple. Simulation and experimental results are provided to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, a photovoltaic (PV)-system maximum power point (MPP) tracking (MPPT) control strategy employing a predictive digital current-controlled converter implemented in conventional hardware resources is presented. Two current programmed controllers (finite-state predictive control and valley current control) have been integrated into a system with current- or voltage-oriented MPPT. The modifications applied to the perturb-and-observe algorithm enable the MPP tracker to interact rapidly with the controller accounting also for abrupt irradiance drops by considering voltage and current limitations. The implementation of digital control in PV systems entails significant advantages of speed and accuracy, although the controller converges correctly at the MPP under irradiance variations featuring fast dynamic response. The proposed controller scheme has been experimentally demonstrated on a digitally current-controlled boost converter delivering power from a PV system. [ABSTRACT FROM PUBLISHER]