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This paper proposes a transformerless line-interactive uninterruptible power supply (UPS) with low ground leakage current. A high-efficiency bidirectional inverter is suggested, which performs the line-interactive UPS functions with low ground leakage current. It has a full-bridge inverter and a bidirectional switch, which operate with the unipolar pulsewidth modulation. Because the bidirectional switch operates at the line-frequency, switching losses can be lower than the previous transformerless inverters. As the inverter operates, the parasitic capacitance between the inverter and the ac voltage ground is clamped to zero voltage for a positive line cycle and to the ac voltage for a negative line cycle, respectively. Thus, the parasitic capacitance can be prevented from being charged or discharged, which ensures the absence of the ground leakage current. The operation modes of the proposed system are described. The control schemes are presented to design the proposed inverter for the line-interactive UPS. Experimental results for a 2.0 kW prototype are discussed to verify the performance of the proposed system. [ABSTRACT FROM AUTHOR]

In this paper, a three-level quasi-switched boost T-type inverter (3L qSBT2I) is proposed. A new pulse-width modulated (PWM) control method is presented to reduce the inductor current ripple of the qSBT2 I. In the introduced PWM technique, the shoot-through duty cycle is maintained constant to keep the modulation index as high as possible. Then, the only control parameters of the qSBT2I are the duty cycles of the two additional switches. By controlling the duty cycles of the two additional switches, the voltage gain of the proposed qSBT2 I can be improved to a value larger than that of the conventional 3L impedance source inverters. The steady-state analysis, operating principles, and comparisons with the impedance source-based 3L inverters are presented. A 1-kW prototype is constructed to verify the operating principle of the 3L qSBT2I. An indirect dc-link voltage regulator and a capacitor voltage-balance controller are applied to the proposed qSBT2I. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method. [ABSTRACT FROM PUBLISHER]

This paper characterizes the sampling effect in digital sinusoidal pulse width modulation (SPWM) of voltage source inverter (VSI). The time-domain analysis presented in this paper establishes the relation between the fundamental frequency, carrier frequency, and the sampling frequency at different modulation indices of the SPWM. The analysis investigates the effect of sampling frequency of the digital controller on the output of the VSI. It is shown that the low-frequency harmonic components appear in the frequency spectrum of the VSI output voltage due to sampling. As a result, the output current of digitally controlled VSI is stepped in nature. The double Fourier integral solution of the switched waveform for inner and outer integral limits has been used to derive the expression. The integral solution is obtained using Jacobi-Anger expansions. The generalized results developed in this paper are useful to investigate the sampling effect in high switching frequency DSPWM. The proposed sampling effect has been analyzed for SPWM of single-phase H-bridge inverter. The analytical results are verified using simulation and experimental results. The experimental results have been obtained with the use of field-programmable gate array (FPGA) as a digital controller. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

A conventional asymmetrical half-bridge (AHB) converter is widely used for dc–dc stage in low-to-medium power system. However, since the asymmetric operation of AHB converter causes the low efficiency over entire load condition, the conventional AHB converter is not usually considered for the candidate of server power system. In order to overcome the problems of the conventional AHB converter, a wide zero-voltage-switching (ZVS) range AHB converter with a clamp switch and a clamp diode is proposed in this paper. The proposed AHB converter (PAHBC) replaces a low-side clamp diode with a MOSFET switch and adds an auxiliary winding, which changes the transformer turns-ratio. From these modifications and the pulsewidth-modulation (PWM) control of clamp switch, the PAHBC can be designed optimally at nominal input condition and obtains additional dc gain at hold-up time condition. These advantages achieve the high conversion efficiency over the entire load condition. The operational principle and analysis of the PAHBC are presented in this paper and verified by a 340–400 V input and 50 V/500 W output laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a single-stage solution for solar photovoltaic (PV) pumping system using a dual-inverter fed open-end winding induction motor drive is presented. The three-level dual-inverter requires a low PV bus voltage compared with its conventional three-level counterpart. This could avoid large string of PV modules and helps in reducing the voltage rating of the capacitors and semiconductor devices used in the system. This may further help in reduction of cost of the system. The proposed single-stage system is operated using an integrated control algorithm, which includes the maximum power point tracking (MPPT), the $V/f$ control, and the sample-averaged zero-sequence elimination (SAZE) pulsewidth modulation (PWM) technique. While the MPPT algorithm ensures the extraction of maximum power from the PV source, the $V/f$ control improves the motor pump performance. Furthermore, the zero-sequence current is avoided by the SAZE PWM algorithm. Thus, the integrated control algorithm improves the overall performance of the system. Furthermore, this paper also presents the details of system design and analysis of its dynamic behavior during transient environmental conditions. The performance of the system is verified using MATLAB simulation and hardware prototype. [ABSTRACT FROM PUBLISHER]

Single-stage power-factor-corrected (S2PFC) power supplies usually suffer from high voltage stress, due to lack of control on the intermediate bus capacitor voltage. In the past, analysis of such voltage stress was mostly based on steady-state condition without providing sufficient explanation during the transient circuit operation. This paper revisits the problem at circuit level and reports that the root cause is due to the inherent negative current feedback property of the output inductor or the transformer operating in continuous conduction mode (CCM). Based on the finding, this paper further proposes a new approach to reducing the voltage stress by adding an auxiliary circuit branch to existing S2PFC converters. The additional circuit branch limits the effect of negative current feedback by suppressing the change of output current slope due to change of load. This assists the pulsewidth modulation controller to track the change of load better such that the bus capacitor voltage range is reduced through duty cycle control. The auxiliary circuit branch also reduces reverse-recovery-related losses of the converter under CCM operation. A laboratory prototype using the popular boost PFC converter combined flyback dc/dc converter was built and tested to confirm the analysis and effectiveness of the approach. [ABSTRACT FROM AUTHOR]

A four-level five-phase open-end winding (OeW) drive topology is introduced in this paper. The drive comprises a five-phase induction machine with open-end stator windings, supplied using two two-level voltage-source inverters with isolated and unequal dc-link voltages, in the ratio 2 : 1. The topology offers the advantages of a modular structure with fewer semiconductor components and has a greater potential for fault tolerance, as compared with an equivalent single-sided four-level drive. Due to the large number of switching states, development of a suitable space vector pulsewidth-modulation (PWM) method can be challenging. Hence, this paper examines the implementation of two-level-shifted carrier-based PWM methods. The effect of dead time on the drive performance is discussed, and it is shown that simultaneous PWM switching of both inverters can lead to degraded output phase voltage waveforms. Detailed analysis of this phenomenon is presented, a solution is proposed, and the modified modulation techniques are incorporated in an experimental setup, at first in conjunction with $V/f$ control. Once the proof of concept has been provided, full field-oriented control is implemented in this OeW drive topology for the first time; detailed experimental testing is conducted, and results are reported. [ABSTRACT FROM AUTHOR]

Multiphase variable-speed drives and generation systems (systems with more than three phases) have become one of the mainstream research areas during the last decade. The main driving forces are the specific applications, predominantly related to the green agenda, such as electric and hybrid electric vehicles (EVs), locomotive traction, ship propulsion, “more-electric” aircraft, remote offshore wind farms for electric energy generation, and general high-power industrial applications. As a result, produced body of significant work is substantial, making it impossible to review all the major developments in a single paper. This paper therefore surveys the recent progress in two specific areas associated with multiphase systems, namely power electronic supply control and innovative ways of using the additional degrees of freedom in multiphase machines for various nontraditional purposes. [ABSTRACT FROM AUTHOR]

This paper investigates time-domain analysis of sampling effect in digital pulsewidth modulation (DPWM) of dc–dc converters. The relation between the sampling delay, duty ratio, and multisampling factor (sampling to carrier frequency ratio) has been characterized. The sampling delay of the digital controller used for DPWM of the dc–dc converter has close relation with the actual pulsewidth-modulation output. An increase in the multisampling factor can reduce the delay effect of the DPWM. The output voltage varies as a stepped function of the duty ratio instead of the linear function as observed in ideal modulation. It is shown in this paper that this delay is a periodic function of the duty ratio. The effect of variations in the sampling frequency, switching frequency, and modulation index has been analyzed. The proposed sampling effect has been verified analytically for the buck, boost, and buck–boost dc–dc converters. The experimental results for the buck and boost converters have been obtained with the control circuit realized through a field-programmable gate array-based digital controller. [ABSTRACT FROM PUBLISHER]

Exploiting the rich switching redundancies of the dual inverter, new hybrid pulsewidth-modulation (PWM) switching methods are proposed in this paper using the degree of freedom of operating the individual inverters independently, in addition to exercising the degree of freedom of controlling the switching action of the individual legs independently. Two voltage entities, namely, common-mode voltage (CMV) and differential-mode voltage are identified in the dual inverter, and all hybrid PWMs are envisaged aimed at reducing and also eliminating the CMV in it. The effects of such attempts on motor shaft voltage and also the motor bearing currents are presented in detail. Furthermore, bearing current profiles of an open-end winding induction motor are also presented with both conventional and hybrid PWMs proposed in this paper. Electric discharge machining discharge currents are completely eliminated with the use of all hybrid PWM methods proposed in this paper. In addition, implications of completely eliminating the CMV are also presented in this paper. All hybrid PWMs proposed in this paper are first simulated using MATLAB and are experimentally verified on a dual two-level inverter feeding a 1.1-kW 415-V 3- $\phi$ open-end winding induction motor drive. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

In this paper, a real-time implementation of selective harmonic elimination pulsewidth modulation (SHEPWM) using generalized Hopfield neural network (GHNN) as applied to the single-phase inverter is designed and discussed. Finding the location of the switching instants in the case of SHEPWM involves the solution of a set of nonlinear algebraic transcendental equations. The problem is redrafted as an optimization problem, and it is solved by using GHNN. Though, in principle, the $n$ number of harmonics can be eliminated using the presented methodology, this paper tries for the case of the elimination of the 5th-, 7th-, 11th-, and 13th-order harmonics while retaining the desired fundamental. An energy function is formulated for this problem and the set of ordinary differential equations (ODEs) describing the behavior of GHNN is obtained. A program in KEIL C was developed to solve these systems of ODEs by the Runge–Kutta fourth-order method to give the switching instants for continuously varying modulation indexes $(M)$. A MATLAB simulation was carried out, and an experimental setup was also constructed in order to validate the simulated results. The fast Fourier transform analysis of the simulated output voltage waveform and the experimental output voltage waveform confirms the effectiveness of the proposed method. Hence, the proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real-time applications. [ABSTRACT FROM PUBLISHER]

A two-motor drive, supplied by a five-leg inverter, is considered in this paper. The independent control of machines with full dc-bus voltage utilization is typically achieved using an existing pulsewidth modulation (PWM) technique in conjunction with field-oriented control, based on PI current control. However, model predictive control (MPC), based on a finite number of control inputs [finite-control-set MPC (FCS-MPC)], does not utilize a pulsewidth modulator. This paper introduces three FCS-MPC schemes for synchronous current control in this drive system. The first scheme uses all of the available switching states. The second and third schemes are aimed at reducing the computational burden and utilize a reduced set of voltage vectors and a duty ratio partitioning principle, respectively. Steady-state and transient performances are analyzed and compared both against each other and with respect to the field-oriented control based on PI controllers and PWM. All analyses are experimental and use the same experimental rig and test conditions. Comparison of the predictive schemes leads to the conclusion that the first two schemes have the fastest transient response. The third scheme has a much smaller current ripple while achieving perfect control decoupling between the machines and is of low computational complexity. Nevertheless, at approximately the same switching loss, the PI-PWM control yields the lowest current ripple but with slower electrical transient response. [ABSTRACT FROM PUBLISHER]

This paper presents a comparison of two modulation methods for the seven-level switched-capacitor (SC) inverter using series/parallel conversion (SCISPC). The SCISPC is a multilevel inverter which has the less number of switching devices than the conventional multilevel inverters. The level-shifted pulsewidth modulation (PWM) (LS-PWM) was applied to the seven-level SCISPC in the previous research. In this paper, the level- and phase-shifted PWM (LPS-PWM) and the LS-PWM are applied to the seven-level SCISPC, and LPS-PWM is compared with LS-PWM for the seven-level SCISPC. The LPS-PWM has both the characteristics of the phase-shifted PWM (PS-PWM) and the LS-PWM. The voltage reduction during the discharging term of the SCs is reduced by means of the shorter discharging period compared to LS-PWM. The voltage ripple of the capacitors is also reduced, which leads to higher power conversion efficiency. The difference of the two modulation methods is confirmed by the theoretical approach, simulation with PSIM, and circuit experiment. [ABSTRACT FROM PUBLISHER]

Conventional zero-voltage and zero-current-switching (ZVZCS) full-bridge converters are widely used because they can realize zero-voltage switching (ZVS) for the leading leg and zero-current switching (ZCS) for the lagging leg. However, the large turn-off loss of the leading leg is still unacceptable in high-voltage high-power applications where insulated-gate bipolar transistors (IGBTs) with current tailing are employed. Hence, it is preferable to achieve ZCS for all IGBTs of full-bridge converters. This paper analyzes the ZCS conditions for pulsewidth modulated (PWM) full-bridge converters and proposes a general strategy for achieving ZCS for main switches, including the control strategy and design method of the topology. Based on this theory, a novel ZCS PWM full-bridge converter with simple auxiliary circuit is derived and tested. It can achieve ZCS not only for the main switches of full-bridge converter, but for the auxiliary switch as well, and obtain high efficiency. The operation principle of the proposed ZCS PWM full-bridge converter and the design procedure are presented. The experimental results of a 600 V/2.5 kW prototype are also included to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

One of the main drawbacks with the use of finite control set model predictive control (FCS-MPC) in power converters is the variable switching frequency. When not taken into consideration, it can vary randomly depending mainly on the operating point of the system and the sampling time. This will produce a wide distributed voltage and current spectrum, causing audible noise, resonances, and poor steady-state behavior. To address this issue, a new algorithm, based on the control of the switching period within the cost function, is proposed in this paper. The algorithm shows to be very effective in achieving a regular commutation pattern, similar to pulse width modulation (PWM) techniques, which is evidenced even by similarities in the sideband harmonics generated in the voltage spectrum. The algorithm is easy to design and implement, demanding very low computation power, and enables a combination of the advantages of FCS-MPC with the benefits of a PWM-like power quality. Simulations and experimental results are presented to validate the proposed method, which are compared to previously reported FCS-MPC techniques dealing with the same challenge. [ABSTRACT FROM PUBLISHER]

Impedance network inverters are the best alternatives for voltage-source and current-source inverters. The boosting capability and the shoot-through solution of such converters make them excellent solutions for various applications. Nevertheless, hard switching forces the converter to operate in low switching frequency, which results in a bulky impedance network. Moreover, the coupling between the shoot-through duty cycle and the inverter modulation index makes a tradeoff between the voltage gain and the modulation index (output voltage harmonics). This paper presents a novel dual switching frequency modulation to mitigate the switching losses of the converter, which results in a more compact impedance network. The proposed method combines a high-frequency pulse width modulation with a low-frequency sinusoidal pulse width modulation (SPWM). Therefore, the switching losses decrease considerably with respect to the conventional simple boost modulation. In addition, the impedance network design frequency remains high, and the network size decreases obviously. The proposed approach removes the interdependence between the shoot-through duty cycle and the inverter modulation index. A comparison between the proposed method and the conventional simple boost method is performed to show its advantages over the conventional method. Finally, experimental results are presented to validate the performance of the proposed method. [ABSTRACT FROM PUBLISHER]

In trasformerless grid-connected photovoltaic (PV) systems, common-mode voltage (CMV) fluctuations cause leakage current flow through the stray capacitance of the PV panels. Shoot-through states in a quasi-Z-source inverter (q-ZSI) increase the amplitude of high-order harmonics of CMV. In this paper, by using the modulation technique based on odd pulse width modulation and minor change in the Z network of the three-phase q-ZSI, the leakage current is blocked. No extra semiconductor element is added. By the proposed technique, CMV is kept nearly constant during switching cycles. The experimental results for CMV analysis in a \text1\;\textkW prototype are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Multilevel inverters (MLIs) have replaced conventional two-level inverters for medium-voltage high-power industrial applications. One of the best modulation techniques for MLIs is the space vector modulation (SVM). Although SVM has its own advantages, it has been overlooked for much simpler carrier-based modulation schemes in the industry. Nearest level modulation (NLM) is a simple alternative, which is functionally similar to SVM. In this paper, a new generalized SVM algorithm is presented, in which the SVM is achieved using the concept of NLM. A generalized switch matrix is introduced to derive gate pulses for the inverter, which further simplifies the algorithm. The algorithm is tested and verified for a three-phase, three-level, and five-level neutral-point-clamped inverters in both simulation and hardware. [ABSTRACT FROM PUBLISHER]

This paper extends the trans-Z-source concept to ac–ac power conversion and proposes a novel single-phase trans-Z-source ac–ac converter. The proposed converter retains the advantages of its existing Z-source/quasi-Z-source counterparts in which the output voltage can be boosted and in-phase with the input voltage or bucked/boosted and out-of-phase with the input voltage. Meanwhile, a coupled inductor is introduced into the proposed converter, and the turns ratio of the coupled inductor become another control variable beside the duty cycle to obtain extreme voltage gain. Importantly, the input voltage and output voltage share the same ground, and the input current could be continuous, which is a benefit for reducing input current harmonics. Most important of all, the safe-commutation strategy for the proposed converter is deep developed, and analytic expression between the switches state and loop circuit voltage/current condition is derived out. Hence, the current/voltage ripple can be avoided without a loss snubber circuit, which benefits a reduced cost and enhanced reliability. The performance analysis is discussed in consideration of parasitic resistance, and system parameter design is optimized based on theoretic calculation. A laboratory prototype is fabricated, and experiments are performed to verify the validation of the proposed converter. [ABSTRACT FROM PUBLISHER]

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted pulse width modulation (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a sorting algorithm implementation that enables single-carrier PD-PWM technique for interleaved two-level converter legs. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the output current is of high quality and shared amongst the phase-legs, while the deviation between the phase-leg currents is well regulated. Simulation results demonstrate the general function of method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach. [ABSTRACT FROM PUBLISHER]

As for ripple-current mode control, it cannot achieve average current tracking, resulting in poor current accuracy and even current waveform distortion. Meanwhile, fast-scale instability may occur in some operating conditions. To solve these problems effectively, a current-ripple compensation (CRC) control technique is proposed in this paper. The error between the average of the controlled current and the reference current is compensated by certain compensation signal, achieving average current tracking while suppressing fast-scale instability. On this basis, the compensator in the outer-voltage loop is further simplified to a proportional part by introducing a rebuilt average reference current. The idea and design procedure of the proposed CRC control technique are discussed in detail. Accordingly, two available implementation schemes for the proposed CRC are presented, including slope compensated and parabolic compensated schemes. Finally, two application cases, respectively, to dc–dc Buck converter and Boost PFC converter, are presented to verify the proposed CRC control technique. [ABSTRACT FROM PUBLISHER]

This paper aims to investigate a disturbance-rejection-based model predictive control (MPC) with two flexible modes (i.e., unconstrained mode and constrained mode) for three-phase inverters with an $LC$ filter. A disturbance observer (DOB) is designed to both simplify the prediction model and achieve the robustness against uncertain parameters. First, the unconstrained mode is designed with a simple horizon-one MPC control law to precisely regulate the output voltage in the steady state. Next, the constrained mode is designed with long-horizon MPC to quickly drive the system to the unconstrained mode by further optimizing the modulation stage. Also, the proposed MPC ensures the robustness and optimality in all operating modes. Especially, the overall closed-loop stability with DOB dynamics is proven by using Lyapunov function. Unlike other MPC methods, the long-horizon MPC in the constrained mode is specialized by finite switching sequences of the sector-based space vector modulation. Comparative studies with the conventional linear quadratic regulator are conducted on a prototype test bed with a TI TMS320F28335 DSP. Then, the proposed MPC method verifies fast dynamic response and advanced voltage regulation (i.e., small steady-state errors and low total harmonic distortion) under various load conditions and uncertain parameters. [ABSTRACT FROM AUTHOR]

In this paper, dual-buck structured single-stage buck–boost inverters that use power MOSFETs to achieve high efficiency are presented. The proposed inverters require fewer switches, and half of the switches have reduced current stresses. They have no shoot-through problem; therefore, high system reliability can be obtained. The dead-time in PWM signals can be minimized or eliminated, which improving the quality of the output ac voltages and increasing the efficiency. In the proposed inverters, MOSFETs can be used without reverse-recovery issues of their body diodes to boost the efficiency and increase the switching frequency. To further improve the efficiency and stability of the proposed single-phase inverter, PWM strategies combining high- and low-frequency modulation are presented. A hardware prototype of the single-phase inverter was built and tested using resistive, inductive, and nonlinear loads. Experimental results for a 300-W prototype inverter show a 97.4% peak efficiency with a 25 kHz switching frequency. [ABSTRACT FROM AUTHOR]

Traditional model predictive control cost functions, when utilizing long prediction horizons ( $N\geq 10$) in power inverter applications, have demonstrated harmonic performances approaching that of schemes based on offline-generated optimal pulse patterns. However, long prediction horizons often prohibitively increase computational load. A different approach to maximizing harmonic performance is taken in this paper. It is shown that shaping the output voltage spectra using a simple feedback mechanism can significantly reduce the length of the required prediction horizon, facilitating a feasible computational load. When a short-horizon cost function is augmented by the feedback mechanism an excellent tradeoff between harmonic performance and switching loss is achieved, even with a prediction horizon of one. It is also shown that the feedback mechanism can be used to improve input reference tracking. Experimental verification of the proposed modulator is performed on a two-level three-phase inverter. [ABSTRACT FROM AUTHOR]

Compared with multilevel space vector modulation, level-shifted multicarrier sinusoidal pulsewidth modulation (SPWM) for nested neutral point-clamped (NNPC) inverters requires much less calculations and implementation efforts, but the existing conventional SPWM cannot suppress the severe flying-capacitor (FC) voltage ripples under low output-frequency conditions. In order to solve this problem, a multicarrier-based PWM strategy with complete voltage balance control (VBC) capacity is proposed in this paper. For NNPC inverters operating under low output-frequency conditions, two preprocessing steps, the zero-sequence injection and the modulation-signal rearrangement, are proposed before the comparisons between level-shifted carriers and modulating signals. These preprocessing steps make the average currents flowing through FCs zero, which is beneficial to greatly reduce the FC voltage ripples under low output-frequency conditions. Together with additional VBC, the proposed modulation can assure the FC voltages balanced under the entire output-frequency conditions. Principles and implementation processes of proposed modulation techniques and VBC methodsare elaborated in detail and compared with conventional modulation methods. Both simulation results from a 5-MVA system and experimental results based on a 5-kVA platform are presented to verify the effectiveness. [ABSTRACT FROM AUTHOR]

This paper presents a comparative evaluation of eight high-voltage step-up converters based on different associations of boost and zeta standard dc–dc pulse width modulation (PWM) cells. These eight converters present different characteristics such as cascaded and stacked PWM cell associations, as well as isolated winding coupled inductors, tapped winding coupled inductors, and noncoupled inductors. In order to explore the advantages and address the limitations of each topology, several comparative evaluations concerning static voltage gain, power losses, current and voltage stresses, component stress factors, power density, relative cost, and efficiency were carried out. From the theoretical analysis and experimental results, the association named stacked boost–zeta with autotransformer yielded the highest efficiency and power density and resulted in the most attractive converter for the case study. [ABSTRACT FROM PUBLISHER]

Transformerless cascaded H-bridge inverters have the advantages of low cost and high efficiency in low-power applications. However, the leakage currents resulting from the parasitic capacitors may increase system losses, electromagnetic interference, and safety concerns. To reduce the leakage current, this paper first establishes the equivalent common-mode circuit of the inverter with the parasitic capacitance and analyzes the characteristics of leakage current in the symmetrical and asymmetrical filter inductance circuit, respectively. The analysis shows that the traditional phase disposition pulse width modulation or phase-shift pulse width modulation cannot solve the leakage current issues, but modifying the modulation methods can eliminate the system leakage current in the symmetrical circuit, and it has a little effect in the asymmetrical circuit. For this reason, a modified phase disposition pulse width modulation for the symmetrical circuit, which can eliminate the leakage current effectively with simple implementation, is proposed. Simulation and experimental results are reported, along with evaluation and comparison results, against a conventional carrier-based pulse width modulation method. [ABSTRACT FROM PUBLISHER]

This paper proposes a new bidirectional direct pulse width modulation (PWM) three-phase buck-boost ac–ac converter. It requires six switches and three inductors and can provide wide range buck-boost voltage operation. It has high reliability due to no short-circuit and open-circuit risks in the converter. Therefore, it solves the commutation problem without using lossy snubber circuits, soft commutation strategies, and coupled inductors. It can be designed with metal–oxide–semiconductor field-effect transistors (MOSFETs) without their body diodes conducting, which eliminate reverse recovery issues and losses of body diodes. In addition, to reduce the ripples in input and output voltages and currents, the proposed converter can be operated with a PWM strategy-II. The PWM strategy-II is a type of interleaved PWM strategy with dead- and overlap-times operating modes. To validate the effectiveness of the proposed converter extensive analysis followed by detailed experimental results are provided. [ABSTRACT FROM PUBLISHER]

In this paper, a new carrier-based pulse width modulation (PWM) strategy providing common-mode voltage (CMV) elimination and reduced current ripple in a three-level neutral-point-clamped inverter is introduced. The employed switching sequences are made up of the three zero CMV (ZCMV) vectors, and one among the three vec-tors is applied at two ends of a half-carrier cycle. The output current ripple characteristics pertaining to those switching sequences are investigated. In a carrier cycle, the root-mean-square current ripple minimization is analyzed and an optimal sequence is derived accordingly. The presented PWM scheme results in a considerably reduced current harmonic distortion in a wide modulation region as compared to the two existing ZCMV schemes on the same average switching frequency. Also, an implementation of sawtooth-carrier-based PWM patterns is proposed for further improvement of the harmonic performance. The algorithm requires small computational burden and is straightforward for an online implementation. Simulation and experimental results are both provided to validate the good performance of the proposed PWM method. [ABSTRACT FROM PUBLISHER]

The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the circulating current will occur inevitably. The existing studies primarily focus on dc, fundamental, and low-frequency circulating current. The high-frequency circulating current (HFCC) caused by asynchronous carriers is studied emphatically in this paper, which is based on the analysis of the change of circulating current in one control cycle. A novel method to suppress HFCC caused by asynchronous carriers of modules is proposed. In this method, the carrier period of slave module is adjustable and the carrier period of the master module is constant. When a large phase shift between modules occurs, an adjusting cycle is inserted to carrier of slave module to realize resynchronizing with master module. It is noted that there is no other commutation between the two modules (expect the dq current reference), such as the carrier information. Finally, the feasibility and effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM PUBLISHER]

For three-phase dual-output dc–ac conversion systems, the nine-switch inverter is one of the most versatile available topologies. Despite some disadvantages, recent studies show that the nine-switch inverter achieves efficiency values equivalent to or higher than its 12-switch counterpart, when operating in certain ranges of the modulation index and displacement angles. The use of proper pulse width modulation techniques is able to increase the efficiency even more, as well as to equalize the loss distribution among the switches, favoring an effective and low-cost thermal design. The available pulse width modulation techniques are complex and do not explore the full capacity of the nine-switch inverter to reduce its losses. For this reason, this paper proposes an unrestricted generalized scalar pulse width modulation for nine-switch inverters. Based on this new generalization, a current peak tracking technique is also proposed, achieving small average number of switchings and the highest overall efficiency when compared with other techniques, likewise a more balanced loss distribution among the switches. Experimental results are carried out to demonstrate the validity of the new generalization and the effectiveness of the proposed technique in reducing the switching losses. [ABSTRACT FROM PUBLISHER]

In this paper, a new zero-voltage switching and resonant core reset pulse width modulation forward converter with a simple auxiliary circuit is introduced. The proposed auxiliary circuit can be applied to both single-switch and two-switch forward converters. The main and the auxiliary mosfets of the proposed converters operate under soft switching condition independent of line and load variation. Also, due to the capability of operating at duty cycles higher than 0.5, the proposed converters can be used for wide input voltage applications. In comparison to the existing zero-voltage transition (ZVT) forward converters, this auxiliary circuit has low number of components and also does not require any additional magnetic element which has improved the power density. The proposed converter is compared with exiting ZVT forward converters in details. The converter steady-state operation is analyzed and various operating modes are explained. Also, in addition to a design example, a comprehensive design procedure is presented. The experimental results of a laboratory prototype of the converter with 85–180 V input voltage and 24 V output voltage at 150 W are provided which verify the theoretical analysis and confirm the converter operation. The overall efficiency of 93.5% is achieved for the proposed converter at full load. [ABSTRACT FROM PUBLISHER]

Dead-time insertion increases noise and torque pulsation in motors under open-loop constant V/f control, and it results in instability in motors under sensorless field-orientated control or direct torque control at low speed, degrading performance of motor drive systems. In order to overcome the drawback of dead-time insertion, a novel current-detection-independent dead-time compensation technique based on terminal voltage A/D conversion is proposed in this paper. Both current polarity and compensation time can be extracted from the sampled terminal voltage. Experiments on an induction motor rated at 210 V, 2.2 kW demonstrated the proposed technique can significantly improve the performance of the fixed compensation, online compensation, and even the feedback compensation method. The proposed scheme does not rely on current sensors, and thus can be applied to both open-loop and closed-loop motor drive systems. When combined with the fixed compensation method, the performance of the proposed technique is even comparable with the feedback compensation method within a large frequency range, making it very attractive for open-loop constant V/f drives where current sensors are not available. [ABSTRACT FROM PUBLISHER]

The impedance-source network converter, utilizing a unique LC network and previously forbidden shoot-through states, provides the ability to buck and boost the input voltage in a single stage. However, the inrush shoot-through current (STC) in startup or transient process might cause undesired current stresses on converter devices. This paper focuses on the STC sensing for an effective inrush current limitation by the combined current sensing technique in the quasi-Z-source inverter. STC and phase currents for the inverter control strategy are obtained simultaneously. No extra hardware is needed and the effects of current sensor bandwidth and duty cycle on the sensing accuracy are analyzed mathematically. The voltage spike gets avoided by integrating the stray inductance into the impedance network. Finally, an STC control loop based on proposed method are embedded in the field-oriented control strategy. The inrush STC and the device current stress in the transient process get suppressed. Simulation and experimental results from a quasi-Z-source inverter validate the feasibility of the proposed methods. [ABSTRACT FROM PUBLISHER]

A fixed-frequency pulse width modulation (PWM) controlled bidirectional current-fed series-resonant converter is proposed in this paper. The proposed bidirectional resonant converter is derived based on integration of a bidirectional boost/buck converter and a dual-active-bridge series-resonant converter. The most attractive feature of the proposed bidirectional resonant converter is that its voltage gain is only determined by the duty cycle of primary-side switches and has nothing to do with the transferred power. Therefore, the direction and amplitude of the transferred power can be easily regulated continuously and smoothly. In addition, with the help of an auxiliary inductor, zero voltage switching can be achieved for all the active switches on both primary and secondary sides within the entire operation range. Furthermore, the converter is suitable for wide voltage applications because its voltage gain can be regulated in a wide range. The operational principles and characteristics of the proposed bidirectional resonant converter are analyzed in detail. The feasibility and effectiveness of the proposed converter are fully verified by the experimental results from a 1.6 kW prototype. [ABSTRACT FROM AUTHOR]

This paper presents the mathematical and harmonic analyses of output phase voltages of three-phase voltage source inverters which employ a hybrid two-dimensional–threedimensional (2-D–3-D) space vector modulation (SVM) voltage control algorithm. The explicit time-domain representation of the harmonic components in addition to the total harmonic distortion (THD) of the output phase voltages is given in terms of system and control parameters. This paper also investigates the harmonic characteristics and THD performance against the linearity of the modulation region which helps in the harmonic performance and design studies of such inverters employing the hybrid 2-D–3-D SVM. The fundamental component of the output voltages follows the reference with lower THD in the linear modulation region rather than the overmodulation region. Experimental results are used to validate these analyses as well as the effectiveness of the hybrid 2-D–3-D SVM algorithm for generating balanced and low THD phase voltages. [ABSTRACT FROM PUBLISHER]

The Z-source inverter (ZSI) employs an LC impedance network between the main inverter bridge and the power source. The unique feature of the ZSI is that it can operate either in buck or boost mode with a wide range of obtainable output voltages from a given input voltage. This topology also exhibits better electromagnetic-interference noise immunity when compared to a traditional voltage-source inverter (VSI). However, the LC impedance network of ZSI significantly increases the size and cost of the power converter and can make it unsuitable for low-power applications. This paper proposes a novel topology called switched boost inverter (SBI) which exhibits similar advantages of ZSI with lower number of passive components and more active components compared to ZSI. The steady-state and small-signal analyses of SBI, along with its pulsewidth modulation (PWM) control strategies, have been discussed in this paper. This paper also presents a comparison of SBI and ZSI with the same input and output parameters. The theoretical analysis given in this paper has been validated using a laboratory prototype of SBI, and the experimental results are presented for verification. The experimental harmonic spectrum of the inverter's output voltage with the proposed PWM technique is also plotted and compared with that of a traditional VSI. All the experimental results show good correlation between theory and experiments. [ABSTRACT FROM PUBLISHER]

The main objective of this paper is to examine the operation of a fundamental buck-based three-phase single-stage ac–dc full-bridge converter. In this paper, the operation of this fundamental converter is explained and analyzed, and a procedure for the design of its key components is derived and demonstrated with an example. The performance and characteristics of the converter are shown with experimental results that have been obtained from a prototype, and general concluding remarks comparing buck-based and boost-based three-phase single-stage ac–dc full-bridge converters are made. [ABSTRACT FROM PUBLISHER]

Neutral-point (NP)-clamped three-level inverter, which is a widely used topology of multilevel converters, suffers from the NP voltage drift as its main technical drawback. The nearest-three-virtual-vector (\NTV^2) modulation method can control the NP voltage balance for any load over the full range of inverter output voltage. However, compared with the nearest-three-vector (NTV) modulation method, \NTV^2 increases the switching frequency. This paper combines \NTV^2 with NTV, and the two methods are used alternately in a fundamental cycle. The duty-cycle coefficients of the redundant small vectors are analyzed to explore the intervals where NTV can control the NP voltage balance in a fundamental cycle. The proportional parameter, which represents the combination of the two methods in hybrid space vector pulsewidth modulation, can be selected to achieve a high-performance NP balance control and low switching frequency. The steady- and transient-state behaviors of the proposed strategy are analyzed in this paper. The experimental results verify the validity of the proposed strategy. [ABSTRACT FROM PUBLISHER]

A dual two-level voltage source inverter (VSI) can synthesize a three-level voltage space vector employing an open-end winding induction motor. Space-vector-based pulsewidth modulation (PWM) variants for this dual VSI are proposed in this paper that offer the dual advantage of limiting the switching power loss to a single VSI at all instants and also reducing the switching commutations in the dual VSI by 50%. The influence of different error volt seconds (affected with different PWM variants) on the motor phase current in the dual VSI is critically analyzed. To this end, two analytical approaches (one using error-voltage trajectory information and the other using switching state information of the dual VSI) are also proposed in this paper to predict the current trajectory and the ripple content in the drive system. Expressions for rms ripple current are developed with different PWM variants. The efficacy of the proposed analytical approaches to predict the current trajectory and the ripple content is confirmed from the experimental results. All the PWM variants are first simulated using MATLAB and verified experimentally by conducting tests on a three-phase open-end winding induction motor drive controlled with volts per hertz control. The implementation of the PWM algorithms only requires instantaneous magnitudes of three-phase reference voltages and completely avoids the sector identification and lookup tables. [ABSTRACT FROM PUBLISHER]

This paper presents a modulation strategy for the modular multilevel converter (MMC) which provides the voltage balancing of the capacitors of different submodules comprising the converter. Not only is this modulation applicable to MMCs constructed with classic two level (2L) submodules, but it is also effective for arrangements with different submodule concepts, for instance, topologies like neutral point clamped (NPC), flying capacitors (FCs), neutral point piloted (NPP), etc. Therefore, firstly, the general modulation philosophy is explained applied to the two level (2L) submodule concept, and secondly, the extension to 3L-NPC and 3L-FC submodule topologies is analyzed. After that, the validation of the studied modulation strategy is carried out by means of successful simulation results, at different switching frequencies and number of submodules. The corresponding experimental results are shown in Part II of this paper after having implemented the aforementioned modulation strategy in a real test bench. In addition to this, a comparison based on thermal analysis and sizing of elements among the four studied submodule topologies is also included. [ABSTRACT FROM PUBLISHER]

In recent years, high photovoltaic array voltage up to 1000 V and transformerless grid-tied inverter have been increasingly researched and applied to elevate the inverter and the dc power collection efficiency. With the same reasons, a three-level neutral point clamped (3L-NPC) inverter featuring low power device voltage stress and low leakage current becomes increasingly attractive. In this paper, the operation and the features of a novel grid-tied 3L-NPC are presented. The proposed topology is a derivative of the three-level stacked neutral point clamped (3L-SNPC) structure. However, compared with the conventional 3L-SNPC and its pulse width modulation (PWM) strategy, the new topology with novel PWM strategy features completely inactive intrinsic body diodes. Furthermore, only two outer power devices are working with switching frequency, while the other four Insulated Gate Bipolar Transistors (IGBTs) are actually with the grid frequency. Therefore, the relatively high switching frequency is selected to reduce the inverter output filter inductance. A hybrid CoolMosfet and IGBT power module configuration is also proposed based on the new PWM strategy. The calculation shows that the total power device losses are reduced. The experimental results are illustrated in this paper to confirm the operation of the proposed topology and controller. [ABSTRACT FROM PUBLISHER]

A generalized space-vector-based spread spectrum modulation scheme for multilevel inverters is proposed in this paper. The proposed scheme uses the principle of sigma–delta modulation as applied to analog-to-digital converters (ADCs), based on the view that a multilevel converter could be interpreted as an oversampling ADC. The principle of vector quantization is utilized for quantizing the instantaneous reference voltage space vector in the proposed space-vector-based sigma–delta converter. The switching vectors of the inverter are naturally selected without sector identification, ensuring optimum switching sequence under all conditions including the overmodulation region. As the sigma–delta converter results in a randomly varying switching frequency, the proposed scheme has spread spectrum characteristics. To avoid fractional arithmetic, a 60 ^\circ coordinate system is used to represent the space vector in this paper. The proposed scheme can be used for any general n-level inverter, and experimental results are presented for four-, five-, and six-level inverters, driving a 2-hp three-phase induction motor in an open-end winding configuration. The experimental results of the proposed scheme are compared with the space-vector pulsewidth modulation (PWM) scheme and random PWM scheme. [ABSTRACT FROM PUBLISHER]

In this paper, an immune algorithm (IA) is developed for optimization of the harmonic performance of a three-phase inverter under the space-vector pulsewidth-modulation (SVPWM) control strategy. The presented algorithm employs the immune approach as the search method for finding the best optimal control vectors and action time of the three-phase inverter. As a result, the optimal control vectors and action time are calculated to minimize the objective function of the weighted total harmonic distortion of the output voltage waveforms. In addition, an experimental platform based on DSP and field-programmable gate array is built. This paper provides a detailed performance analysis of the method with comparison to the conventional SVPWM. The simulation and experimental results verify the superiority of the best control sequences generated by IA compared with the existing conventional control strategies. [ABSTRACT FROM PUBLISHER]

A new pulse width modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is developed and presented in this paper. The proposed PWM scheme not only takes advantage of the special properties available in NPC inverters, but also reduces the switching loss of the inverter along with an inherent neutral point (NP) voltage control. Based on a circuit-level decoupling concept, the NPC inverter can be decoupled into two three-level Buck converters in every defined operating section, and thereby the controller design can be simplified. The salient features of the proposed scheme, as compared with the existing carrier-based DPWM strategies, are: 1) its reduced computational processing time, 2) its capability to balance the dc-link voltage without any additional control, and 3) its reduced complexity, e.g., only one carrier wave needed for pulse width modulating. Same as a space-vector modulation, the maximum modulation index, 1.1547, can be attainable by the proposed scheme. Moreover, compared to conventional continuous sinusoidal PWM, using this technique proposed here, the switching losses of the devices can be reduced by one third. In order to explain the operation of this topology properly, the decoupling principle including the driving signal synthesis and the NP potential variation are analyzed in detail in this paper. Finally, the viability and performance of the proposed modulation scheme are shown through simulation and experimental results in a laboratory prototype. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) is a newly emerging multilevel topology for high-voltage applications during recent years. In this paper, a new MMC is proposed, and the structure and operating principle are analyzed. Owing to the cascaded basic cells without multiwinding transformer, the voltage balancing of floating capacitors must be considered. However, the voltage fluctuation also exists, and theoretical analysis indicates that the amplitude is inversely proportional to the fundamental frequency. This paper has proposed a voltage-fluctuation-suppression method which can reduce the amplitude of the voltage fluctuation in low-frequency region. It can also be used in motor driving with pump/blowerlike load at low frequency and improve the start-up performance significantly. A low-power three-phase five-level prototype is designed and built up to demonstrate the validity of this method. [ABSTRACT FROM PUBLISHER]

This paper discusses the implementation of level-shifted and phase-shifted carrier-based modulation methods, in conjunction with a multiphase open-end winding drive topology. The considered drive is supplied using two five-phase two-level voltage source inverters (VSIs), with input provided from two isolated supplies of equal dc voltages. The topology is known to yield the same space-vector pattern as a corresponding three-level inverter in single-sided supply mode. It is shown in this paper that, with the application of a simple logic, the same phase voltage waveforms result as those obtainable with the appropriate carrier-based modulation scheme applied to the three-level VSI in single-sided supply mode. While the outcomes of the modulation techniques are the same, the open-end winding topology offers certain advantages, such as modularity and absence of capacitor voltage balancing requirements. The analysis is conducted for selected modulation methods using voltage and current waveforms, spectra Fast Fourier Transform (FFT), and total harmonic distortion as figures of merit. Theoretical considerations are verified by means of simulation and experimental results. [ABSTRACT FROM PUBLISHER]